> On Feb. 7, 2012, 12:28 p.m., Steve Reinhardt wrote: > > src/mem/cache/prefetch/Prefetcher.py, line 6 > > <http://reviews.gem5.org/r/1011/diff/1/?file=21457#file21457line6> > > > > Can we take this opportunity to remove the 'prefetch(er)_' prefixes > > from these param names? The original purpose was to distinguish them among > > the cache params, but that's not necessary anymore, and now it's just > > redundant and verbose. > > Ali Saidi wrote: > for size I think it makes sense, but what about for the rest of them? > e.g. prefetch_past_page? Seems more descriptive than past_page. > > size, serial_squash, degree, latency, use_cpu_id seem like good > candidates, but I'm a bit unsure about past_pages nd data_access_only? > Either way I don't care so just tell me what you'd prefer and I'll fix it > once.
Good point, I didn't look at them individually. I think all of them are fine just truncating the prefix except prefetch_past_page. That one I'd just rename to cross_pages or cross_page_boundaries. Then the names are all reasonably correlated with their description strings, which seems like a good thing. - Steve ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1011/#review2090 ----------------------------------------------------------- On Jan. 26, 2012, 4:30 a.m., Ali Saidi wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1011/ > ----------------------------------------------------------- > > (Updated Jan. 26, 2012, 4:30 a.m.) > > > Review request for Default. > > > Description > ------- > > prefetcher: Make prefetcher a sim object instead of it being a parameter on > cache > > > Diffs > ----- > > src/mem/cache/BaseCache.py 78b08f92c290 > src/mem/cache/builder.cc 78b08f92c290 > src/mem/cache/cache.hh 78b08f92c290 > src/mem/cache/cache_impl.hh 78b08f92c290 > src/mem/cache/prefetch/Prefetcher.py PRE-CREATION > src/mem/cache/prefetch/SConscript 78b08f92c290 > src/mem/cache/prefetch/base.hh 78b08f92c290 > src/mem/cache/prefetch/base.cc 78b08f92c290 > src/mem/cache/prefetch/ghb.hh 78b08f92c290 > src/mem/cache/prefetch/ghb.cc 78b08f92c290 > src/mem/cache/prefetch/stride.hh 78b08f92c290 > src/mem/cache/prefetch/stride.cc 78b08f92c290 > src/mem/cache/prefetch/tagged.hh 78b08f92c290 > src/mem/cache/prefetch/tagged.cc 78b08f92c290 > > Diff: http://reviews.gem5.org/r/1011/diff/diff > > > Testing > ------- > > > Thanks, > > Ali Saidi > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
