On 15.07.2013 03:33, Nilay Vaish wrote:
> On Thu, 11 Jul 2013, Ali Saidi wrote: > >> Going back to my question, other than you starting the CPU in the Idle state, is there any way for it to get in there? If the only time this ever occurs is when one cpu hasn't actually booted yet, then I guess it will work. I still feel that Andreas' suggest about a halt and ret micro-op would be better. I think it will solve your immediate problem, since none of the cpus for my architecture of choice are going to stay in the idle state for after the first cycle of execution it doesn't matter to much to me, but it might be the source of subtle bugs with the non-interrupt ways to exit halt than Andreas mentioned. > > I think you are making a guess over here that a cpu cannot move to the > Idle state. What if a cpu has no process to execute? Would it not move to > the Idle state? Andreas, you or any one else who is involved in the effort > were not able to predict that such a possibility exists. If we do not want > a cpu to move Idle state, we should explicitly rule it out in the source > code. I don't think that has happened. Moreover, I do not see why the > probability of a bug creeping in would be higher in one case than the > other. > > -- > Nilay > _______________________________________________ > gem5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/gem5-dev [1] I'm not making a guess, I'm looking at the source code. No where in it does the fetch stage move to the "idle" state: 10:15:45 [ ~/work/gem5] find src/cpu/o3/fetch* | xargs grep "=.*Idle" src/cpu/o3/fetch_impl.hh: idleRate = fetchIdleCycles * 100 / cpu->numCycles; src/cpu/o3/fetch_impl.hh: assert(fetchStatus[i] == Idle || stalls[i].drain); src/cpu/o3/fetch_impl.hh: if (!(fetchStatus[i] == Idle || src/cpu/o3/fetch_impl.hh: if (fetchStatus[tid] == Idle) { src/cpu/o3/fetch_impl.hh: fetchStatus[tid] == Idle) { src/cpu/o3/fetch_impl.hh: fetchStatus[high_pri] == Idle) { src/cpu/o3/fetch_impl.hh: fetchStatus[high_pri] == Idle) src/cpu/o3/fetch_impl.hh: fetchStatus[high_pri] == Idle) Idle in this case means idle from the simulators point of view not the guest operating system. I believe the only way it's Idle (although I happily admit all the CPU states aren't crisply defined), is it's initialized to Idle before the simulation starts. Ali Links: ------ [1] http://m5sim.org/mailman/listinfo/gem5-dev _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
