On 05.07.2013 16:49, Nilay Vaish wrote:
> On Fri, 5 Jul 2013, Ali Saidi wrote: > >> On 03.07.2013 12:20, Nilay Vaish wrote: >> >>> I think we >> agreed that if the cpu moves to the idle state in the middle of >> >>> an >> instruction, then its fine. I'm pretty sure that still doesn't work. If you try to hand over execute to a virtualized CPU and you're in the middle of an instruction it doesn't seem possibly for it to work. > > I need a concrete example here. As I understand, if the processor has > moved to the Idle state in the middle of an instruction, it would not > complete that instruction. Whatever wakes up the processor in future will > also tell the processor what to do next. > > -- > Nilay > _______________________________________________ > gem5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/gem5-dev [1] Now lets say we're using the code that Andreas Sandberg committed ~6 months ago that lets you migrate execution between gem5 CPU models and a KVM virtual CPU. If you drain the system and stop in the middle of an instruction, there is no way the KVM virtual CPU is going to be able to pick up where you left off. Ali Links: ------ [1] http://m5sim.org/mailman/listinfo/gem5-dev _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
