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(Updated May 6, 2015, 3:21 p.m.) Review request for Default. Changes ------- Updated to tip of tree. Fixed memory leak and spelling error. Note that I had to remove the recently added 'const' modifier from the pkt field of the MSHR::Target object as part of the update. As mentioned in the comment, we really need to use the existing Packet object for the response and substitute in a dummy packet, since the former has the allocated data pointer for the response data. I tried the option of creating a new packet for the response, but there's no clean way to move an dynamically allocated data pointer from an existing packet to a new one. We could add methods to Packet to do this, but since it's all just to avoid removing 'const' from the pkt field, it seemed easier just to remove 'const'. If anyone has a better idea on how to handle this, I'm listening. Repository: gem5 Description ------- Changeset 10745:9b84d1b570e3 --------------------------- mem: implement x86 locked accesses in timing-mode classic cache Add LockedRMW(Read|Write)(Req|Resp) commands. In timing mode, use a combination of clearing permission bits and leaving an MSHR in place to prevent accesses & snoops from touching a locked block between the read and write parts of an locked RMW sequence. Diffs (updated) ----- src/mem/cache/cache_impl.hh fbdaa08aaa426b9f4660c366f934ccb670d954ec src/mem/cache/mshr.hh fbdaa08aaa426b9f4660c366f934ccb670d954ec src/mem/packet.hh fbdaa08aaa426b9f4660c366f934ccb670d954ec src/mem/packet.cc fbdaa08aaa426b9f4660c366f934ccb670d954ec Diff: http://reviews.gem5.org/r/2691/diff/ Testing ------- Thanks, Steve Reinhardt _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
