# HG changeset patch
# User Korey Sewell <ksew...@umich.edu>
# Date 1236007006 18000
# Node ID bcb6c464587b1ef278165ff41442b226fed2a4a9
# Parent  8340f7c1862ea4bcb29e6e018dbdb8ae19b282ce
Give TimeBuffer an ID that can be set. Necessary because InOrder uses generic 
stages so w/o an ID there is no way to differentiate buffers when debugging

diff -r 8340f7c1862e -r bcb6c464587b src/base/timebuf.hh
--- a/src/base/timebuf.hh       Mon Mar 02 10:16:45 2009 -0500
+++ b/src/base/timebuf.hh       Mon Mar 02 10:16:46 2009 -0500
@@ -43,6 +43,7 @@ class TimeBuffer
     int past;
     int future;
     int size;
+    int id;
 
     char *data;
     std::vector<char *> index;
@@ -148,6 +149,7 @@ class TimeBuffer
             new (ptr) T;
             ptr += sizeof(T);
         }
+        id = -1;
     }
 
     TimeBuffer()
@@ -160,6 +162,16 @@ class TimeBuffer
         for (int i = 0; i < size; ++i)
             (reinterpret_cast<T *>(index[i]))->~T();
         delete [] data;
+    }
+
+    void setId(int _id)
+    {
+        id = _id;
+    }
+
+    int getId()
+    {
+        return id;
     }
 
     void
diff -r 8340f7c1862e -r bcb6c464587b src/cpu/inorder/cpu.cc
--- a/src/cpu/inorder/cpu.cc    Mon Mar 02 10:16:45 2009 -0500
+++ b/src/cpu/inorder/cpu.cc    Mon Mar 02 10:16:46 2009 -0500
@@ -230,11 +230,9 @@ InOrderCPU::InOrderCPU(Params *params)
     }
 
     // Initialize TimeBuffer Stage Queues
-    // For now just have these time buffers be pretty big.
-    // @note: This could be statically allocated but changes
-    // would have to be made to the standard time buffer class.
     for (int stNum=0; stNum < NumStages - 1; stNum++) {
         stageQueue[stNum] = new StageQueue(NumStages, NumStages);
+        stageQueue[stNum]->setId(stNum);
     }
 
 
diff -r 8340f7c1862e -r bcb6c464587b src/cpu/inorder/pipeline_stage.cc
--- a/src/cpu/inorder/pipeline_stage.cc Mon Mar 02 10:16:45 2009 -0500
+++ b/src/cpu/inorder/pipeline_stage.cc Mon Mar 02 10:16:46 2009 -0500
@@ -556,8 +556,8 @@ PipelineStage::sortInsts()
     if (prevStageValid) {
         int insts_from_prev_stage = prevStage->size;
 
-        DPRINTF(InOrderStage, "%i insts available from previous stage.\n",
-                insts_from_prev_stage);
+        DPRINTF(InOrderStage, "%i insts available from stage buffer %i.\n",
+                insts_from_prev_stage, prevStageQueue->getId());
 
         for (int i = 0; i < insts_from_prev_stage; ++i) {
 
@@ -985,8 +985,9 @@ PipelineStage::sendInstToNextStage(DynIn
                     tid, cpu->pipelineStage[next_stage]->stageBufferAvail());
 
             DPRINTF(InOrderStage, "[tid:%u]: [sn:%i]: being placed into  "
-                    "index %i stage %i queue.\n",
-                    tid, inst->seqNum, toNextStageIndex, inst->nextStage);
+                    "index %i of stage buffer %i queue.\n",
+                    tid, inst->seqNum, toNextStageIndex,
+                    cpu->pipelineStage[prev_stage]->nextStageQueue->getId());
 
             int next_stage_idx = 
cpu->pipelineStage[prev_stage]->nextStage->size;
 
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