This looks pretty straightforward to me...

On Mon, Nov 9, 2009 at 5:30 AM, Timothy M. Jones <tjon...@inf.ed.ac.uk> wrote:
> # HG changeset patch
> # User Timothy M. Jones <tjon...@inf.ed.ac.uk>
> # Date 1257772283 0
> # Node ID 861198113ecaf172b6d1e874cda4d13c92bdb38a
> # Parent  e9f450b4b4f276dd3ed69dd63a540dda2796de60
> Power ISA: Add an alignment fault to Power ISA and check alignment in TLB.
>
> diff --git a/src/arch/power/faults.hh b/src/arch/power/faults.hh
> --- a/src/arch/power/faults.hh
> +++ b/src/arch/power/faults.hh
> @@ -76,6 +76,22 @@
>  };
>
>
> +class AlignmentFault : public PowerFault
> +{
> +  public:
> +    AlignmentFault()
> +        : PowerFault("Alignment")
> +    {
> +    }
> +
> +    bool
> +    isAlignmentFault() const
> +    {
> +        return true;
> +    }
> +};
> +
> +
>  static inline Fault
>  genMachineCheckFault()
>  {
> diff --git a/src/arch/power/tlb.cc b/src/arch/power/tlb.cc
> --- a/src/arch/power/tlb.cc
> +++ b/src/arch/power/tlb.cc
> @@ -281,9 +281,27 @@
>  }
>
>  Fault
> -TLB::translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode)
> +TLB::translateInst(RequestPtr req, ThreadContext *tc)
>  {
> -#if !FULL_SYSTEM
> +    // Instruction accesses must be word-aligned
> +    if (req->getVaddr() & 0x3) {
> +        DPRINTF(TLB, "Alignment Fault on %#x, size = %d\n", req->getVaddr(),
> +                req->getSize());
> +        return new AlignmentFault();
> +    }
> +
> +     Process * p = tc->getProcessPtr();
> +
> +     Fault fault = p->pTable->translate(req);
> +    if (fault != NoFault)
> +        return fault;
> +
> +    return NoFault;
> +}
> +
> +Fault
> +TLB::translateData(RequestPtr req, ThreadContext *tc, bool write)
> +{
>     Process * p = tc->getProcessPtr();
>
>     Fault fault = p->pTable->translate(req);
> @@ -291,6 +309,16 @@
>         return fault;
>
>     return NoFault;
> +}
> +
> +Fault
> +TLB::translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode)
> +{
> +#if !FULL_SYSTEM
> +    if (mode == Execute)
> +        return translateInst(req, tc);
> +    else
> +        return translateData(req, tc, mode == Write);
>  #else
>   fatal("translate atomic not yet implemented\n");
>  #endif
> diff --git a/src/arch/power/tlb.hh b/src/arch/power/tlb.hh
> --- a/src/arch/power/tlb.hh
> +++ b/src/arch/power/tlb.hh
> @@ -156,6 +156,8 @@
>     // static helper functions... really
>     static bool validVirtualAddress(Addr vaddr);
>     static Fault checkCacheability(RequestPtr &req);
> +    Fault translateInst(RequestPtr req, ThreadContext *tc);
> +    Fault translateData(RequestPtr req, ThreadContext *tc, bool write);
>     Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode);
>     void translateTiming(RequestPtr req, ThreadContext *tc,
>                          Translation *translation, Mode mode);
>
> --
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> Scotland, with registration number SC005336.
>
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