On Tue, 01 Dec 2009 20:37:57 -0000, Steve Reinhardt <ste...@gmail.com> wrote:
> It looks like you lost the initialization of isUncacheable... is that > safe? > Hm, yes I'll fix that. > Actually I'm not sure why we need that variable, and don't just have > BaseDynInst::uncacheable() call req->isUncacheable() directly (unless > there are times we call it when we don't have a req, but then how do > we know the right answer?). > I'll check this out and fix up if I can. > Also I'd suggest just folding this patch in with your last patch that > fixes up TimingSimpleCPU too, basically getting there in one step > instead of two. > Ok, no problem. I'll make them a single patch. Cheers Tim -- The University of Edinburgh is a charitable body, registered in Scotland, with registration number SC005336. _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
