Hello Prateek,
I have the same issue for adding L3 cache. Would you please let me know
what was the if-else ladder you fixed in the code. I would really
appreciate if you send me the cacheconfig.py file . I am getting this error
when I am running gem5
File "<string>", line 1, in <module>
File "/home/mot/gem5/src/python/m5/main.py", line 388, in main
exec filecode in scope
File "configs/example/fs.py", line 55, in <module>
import CacheConfig
File "/home/mot/gem5/configs/common/CacheConfig.py", line 65
if options.l3cache:
On Tue, Apr 8, 2014 at 3:54 AM, Prateek Gupta <[email protected]> wrote:
> Thanks Andreas,
>
> I figured out my mistake in the CacheConfig.py file-a minor bug in the
> if-else ladder. I am now bit stuck in moving further in modeling and
> changing the technology parameters of L3 cache. Please correct me if I am
> wrong as I figured out that the changes are to be made in the
> simpleDRAM.py, cache_impl.hh, simple_dram.hh/cc files for changing the DRAM
> technology parameters but I am not sure, whether by only changing the
> parameters in these files will lend up in modeling the L3 cache as e-DRAM
> or STT-RAM. Kindly let me know what are the additions and in what source
> files are to be done (if possible) and also whether the default
> configuration of the L1, L2 , L3 caches is a typical 6T-SRAM and whether is
> it different from the main memory configuration and how I can change it?
> The command --mem-type="XXXX" is used to specify the type for main memory
> only, am I right??
>
>
> Thanks,
> Prateek
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