Hi Andreas, I was looking into the option of probes. I wanted to first test the probes provided by SimpleTrace. Looking at the code it looks like if I run the gem5 command with --debug-flags=SimpleTrace, I should see the DPRINTFs given in the listener functions right. But I am not getting that. Do I need to do something else. It seems that SimpleTrace class is not instantiated anywhere, do I have to do that to make it run?
Thanks for your help :) On Wed, Apr 15, 2015 at 6:28 PM, Andreas Hansson <andreas.hans...@arm.com> wrote: > Hi all, > > The nice and clean option would be to use add an architecturally visible > performance counter read from the DVFS governor (in software). > > The hackish option is to change the clock speed behind the back of the > OS, by having the DVFSHandler object change the clocks based on e.g. a > probe point or similar. > > Andreas > > From: Nimish Girdhar <nimi...@tamu.edu> > Reply-To: gem5 users mailing list <gem5-users@gem5.org> > Date: Wednesday, 15 April 2015 20:04 > To: gem5 users mailing list <gem5-users@gem5.org> > Subject: Re: [gem5-users] DVFS with self defined policies on gem5 > > Okay.....Actually I am making the decision of what frequency which core > has to run, inside the cpu... > > So I guess I have to somehow communicate this to the dvfs handler which > doesn't look so clean.... > > Is there any other way around or hack anybody has done?? > On Apr 15, 2015 10:14 AM, "Yahia Benmoussa" <yahia.benmou...@gmail.com> > wrote: > >> Hello, >> >> Setting the required frequency in >> /sys/devices/system/cpu/cpu*/cpufreq/scaling_setspeed should not be in gem5 >> sources files. It can be done in a program (written in C, shell script or >> any other language) >> and running under Linux in FS mode. >> >> Regards >> Yahia >> >> 2015-04-15 16:55 GMT+02:00 Nimish Girdhar <nimi...@tamu.edu>: >> >>> Thanks Yahia for sharing that. >>> >>> Can you explain a bit more as I don't have much experience with that. >>> >>> Let's say I have some algo to decide the cpu freq in gem5 >>> SRC/CPU/O3/commit_impl.hh... How can I set the file you mentioned to that >>> freq from here?? >>> >>> Thanks, >>> On Apr 15, 2015 2:53 AM, "Yahia Benmoussa" <yahia.benmou...@gmail.com> >>> wrote: >>> >>>> Hello, >>>> >>>> You have to enable userspace governor in your kernel then you can >>>> scale the CPU frequency by setting >>>> /sys/devices/system/cpu/cpu*/cpufreq/scaling_setspeed file. It should work. >>>> >>>> Regards. >>>> Yahia >>>> >>>> >>>> 2015-04-15 4:00 GMT+02:00 Nimish Girdhar <nimi...@tamu.edu>: >>>> >>>>> Hello all, >>>>> >>>>> I am working on a project where I have to use DVFS to change the >>>>> frequency of cores based on my evaluation of some counters that I inserted >>>>> in the gem5 o3 cpu src code. >>>>> >>>>> I followed the guidelines given on >>>>> http://www.m5sim.org/Running_gem5#Experimenting_with_DVFS . >>>>> But with these steps, the kernel will be the one who decides the >>>>> performance levels of the cores at different point of time. But in my case >>>>> I want to decide the levels based on some counters as mentioned above. >>>>> >>>>> Has anybody tried anything similar to that? I want to know how can I >>>>> access and update the dvfs handler registers from within the cpu src code. >>>>> >>>>> Any help will be appreciated. >>>>> >>>>> Thanks, >>>>> >>>>> -- >>>>> Warm regards >>>>> Nimish Girdhar >>>>> Department of Electrical and Computer Engineering >>>>> Texas A&M University >>>>> >>>>> _______________________________________________ >>>>> gem5-users mailing list >>>>> gem5-users@gem5.org >>>>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >>>>> >>>> >>>> >>>> _______________________________________________ >>>> gem5-users mailing list >>>> gem5-users@gem5.org >>>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >>>> >>> >>> _______________________________________________ >>> gem5-users mailing list >>> gem5-users@gem5.org >>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >>> >> >> >> _______________________________________________ >> gem5-users mailing list >> gem5-users@gem5.org >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> > > -- IMPORTANT NOTICE: The contents of this email and any attachments are > confidential and may also be privileged. If you are not the intended > recipient, please notify the sender immediately and do not disclose the > contents to any other person, use it for any purpose, or store or copy the > information in any medium. Thank you. > > ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, > Registered in England & Wales, Company No: 2557590 > ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, > Registered in England & Wales, Company No: 2548782 > > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -- Warm regards Nimish Girdhar Department of Electrical and Computer Engineering Texas A&M University
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