On 4/20/2023 11:56 AM, 中国石油大学张天 via gem5-users wrote:
Thank you for your reply again, hahahaha. I have been thinking recently whether it is possible to design ALU through Verilog, translate it through Verilator or other tools, and ultimately use it in Gem5. I'm not sure if it's feasible. I am so obsessed with ALU because I need to provide a rough reproduction of an article that uses the Residual Number System (RNS) to design a CPU core. Since I first learned about Gem5, I wanted to keep working on this tool. But now it doesn't seem very good.
As far as gem5 is concerned, you could just write the operations in C++. Though if the overall result is the same as regular binary arithmetic, there is little point. gem5 simply does not model at that level. What would you be showing? If you want to be modeling things at that level, maybe building up a CPU using an FPGA board is for you. Best wishes - EM _______________________________________________ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org
