For a more precise time frame on the introduction of IBM implementation of 
S/390 architecture 
using a combination of native hardware microarchitecture plus millicode, this 
reference agrees with my memory that it was generation 4 of the IBM CMOS 
processors.

https://en.wikipedia.org/wiki/Millicode

  The G1, G2, and G3  9672 processors were designed at the IBM Boeblingen lab, 
and I am
not familiar with the underlying hardware microarchitecture of those machines.  
I do remember that that
from doing problem diagnosis during MVS bring up on those machines that the 
term "microcode"
was still being used.

Jim Mulder z/OS Diagnosis, Design, Development, Test  IBM Corp. Poughkeepsie NY
   

-----Original Message-----
From: Jim Mulder <[email protected]> 
Sent: Tuesday, November 22, 2022 10:01 PM
To: [email protected]
Subject: Re: Storage protection keys


  My wife agrees with you that my "vaccine research" comment was over the top, 
and I am trained to accept her judgement on such matters of decorum, so I 
apologize for that.
 
  I agreed with you that processor designs of the XA/ESA era were as you 
described.  The IBM 303x, 308x,and 3090 processors all implemented the 370, 
370/XA, and 370/ESA instruction sets via microcode on top of underlying 
different hardware microarchitectures, which could be characterized as a form 
of emulation.  And I agree that, for that era, your statement that "last 
HARDWIRED CPU was probably the S/360 & S/370 model 195"
is correct.
 
 However, the facts are that the IBM Power processor chips and the IBM z 
processor chips are separate entities.
IBM  z/Architecture has never been implemented by IBM on IBM Power processor 
chips, other than a brief period where the zPDT software emulator had versions 
for both Power and x86 machines.  The Power version was subsequently 
discontinued.
For more than the past decade, a considerable number of the z/Architecture 
instructions have been implemented directly in hardware, with some others being 
cracked into multiple hardware ops, and some more complex instructions being 
implemented in millicode.
If you want to think of the millicoded instructions as a form of emulation, I 
don't object.  However, it is done on z hardware, not Power hardware.
 
Jim Mulder z/OS Diagnosis, Design, Development, Test  IBM Corp. Poughkeepsie NY
 
"My friends, you know me to be neither rash nor impulsive. I am not given to
wild, unsupported statements."   (Jor-El, "Superman",  1978, somewhat out of 
context)
 
-----Original Message-----
From: IBM Mainframe Discussion List <[email protected]> On Behalf Of 
Paul Gorlinsky
Sent: Tuesday, November 22, 2022 8:54 PM
To: [email protected]
Subject: Re: Storage protection keys
 
Interesting that you have to resort to a childish rant ... So totally 
unprofessional ...
 
BTW if you read the documents you proved they actually prove my point ...
 
Dr. Gene Amdahl picked me to lead the design and build of his CMOS XA processor 
for a reason ... My direct OS and hardware experience... 52 years worth...
 
Paul
 
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