>Even if they are a little slower, it would not take very many eliminated >"save and load another base register" scenarios to make up for it.
It is my understanding that if anything relative branches are faster, not slower than base-displacement branches (at least in part because the pipeline can know that the target of a relative branch cannot possibly change, unlike a base-displacement branch where the base could conceivably change even if in practice it almost never does) >why can't we inspect control >register 0 in problem state (without the extraction bit on) May I inquire what in control register 0 is of interest/use to your program? Most data represented in CR0 is not of interest to applications (or is identified to applications by the presence of feature bits, such as in the CVT). >Immediate vs other Quite clearly, an "immediate" is going to beat the heck out of a reference to storage (even if the data is in the L1 cache). I don't know how things like LHI 0,8 and LA 0,8 compare. When your "immediate" is more bytes of instructions than the alternative, to the extent that causes your code footprint to occupy more cache lines, comparisons become even more difficult. Peter Relson z/OS Core Technology Design ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
