My suggestion is, that the new instruction
SKPNZ (for example)
skips the following instruction, if the CC is NZ.
That is, the following instruction should not be executed,
but of course the opcode of the following instruction has to be fetched,
which gives the length of the instruction and allows the PSW to be
incremented
depending on the length. No need for a skip amount.
The key is: the hardware today doesn't have the possibility to fetch an
instruction,
but not execute it. The decision not to execute it has to be delayed until
the value of the CC is known, which may be a problem to out -of-order
execution
etc.; that was the reason why I was asking the question, what the
experts think
about my suggestion. (It is almost the same with branch prediction etc.;
I don't know if it is easier or harder to cope with this skip mechanism
than
with true branches).
The new instruction could be a 2 byte instruction (new format),
where only a one byte opcode is used, and a 4 bit mask for the
condition codes, like in BC. (I hope there is a free opcode in
the 01 to 3f range).
SKPNZ, of course, is an extended mnemonic for SKPC 7
(skip on condition, I hope I got the 7 right, didn't use explicit
condition masks for a long time).
I'm still not sure, if this is a good idea or not ...
Kind regards
Bernd
Am 18.02.2014 15:50, schrieb Gerhard Postpischil:
On 2/18/2014 9:40 AM, Tom Marchant wrote:
On zOS machines you'd need to
specify the skip amount to make them usable in general, or use macros?
Why? The next instruction would already have been fetched, as well as
the following instruction.
How could a macro help the hardware process a new instruction?
I was positing an instruction that could accommodate various
subsequent instruction lengths. Either the coder would need to know
and specify that length, or else use a macro to have it done under the
covers. Sorry the post wasn't clear on that.
Gerhard Postpischil
Bradford, Vermont
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