On 19/02/2014 4:00 PM, Ed Jaffe wrote:
On 2/18/2014 1:59 PM, John Gilmore wrote:
... The cache
and other such programmer-inaccessible machinery are devices for
optimizing and in particular speeding up the code that programmers
write or translators generate.
Their characteristics, mostly but not entirely undocumented, must be
inferred, at least by programmers outside IBM, from black-box
experiments, In my own experience these experiments yield differing
results over time: IBM is changing/improving this machinery at
intervals that are short enough to be, in part at least, detectable.
The caching "machinery" is becoming more transparent and controllable
with each new hardware generation.
My programmer "life" changed when I first became aware that I could
_dramatically_ affect the performance of certain important MVCL
instructions by placing various (documented) value(s) into the unused
padding byte. Years later, I successfully used PFD to speed up some
critical, memory-intensive processing. I have not yet experimented
with NIAI, but it looks promising. (I suspect Java uses it already.)
The zLinux kernel and glibc for z source code is always a good reference
for hardware specific performance tricks, like this memcpy()
http://code.metager.de/source/xref/lib/eglibc/libc/sysdeps/s390/s390-32/multiarch/memcpy.S.
Interestingly they switch to a mvcle for copies > 64MB.
The Configuration-Topology Facility looks to be primarily for
operating system (dispatcher) use, but understanding how it's used is
still an objective of mine.
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