> Subject: [PATCH v3 25/31] drm/i915/bios: parse EHL's VS/PE-O tables > > EHL's VS/PE-O tables have more columns than icl_ddi_buf_trans contains fields. > This prevents casting block->tables to point at icl_ddi_buf_trans and parsing > it > trivially. > > Parse each entry from every table into kzalloc'd buffers' matrix. Read number > of > tables and number of columns from the block. Assume that each table contains > 10 rows. > > Inflate icl_ddi_buf_trans since each VBT-based value is stored on u32. > Reducing the size will be done in separate commit. > > Add EHL to workaround for availability of VS/PE-O parsing.
Squash patch 25, 26 Regards, Suraj Kandpal > > v2->v3 > - remove unnecessary braces from if block > > Signed-off-by: Michał Grzelak <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_bios.c | 34 +++++++++++++++++++ > .../drm/i915/display/intel_ddi_buf_trans.h | 10 +++--- > 2 files changed, 39 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c > b/drivers/gpu/drm/i915/display/intel_bios.c > index c6a53319809ee..5e1000a72cf74 100644 > --- a/drivers/gpu/drm/i915/display/intel_bios.c > +++ b/drivers/gpu/drm/i915/display/intel_bios.c > @@ -2187,6 +2187,32 @@ parse_compression_parameters(struct intel_display > *display) > } > } > > +static void > +parse_vswing_preemph_icl(union intel_ddi_buf_trans_entry **bufs_mtrx, > + const struct bdb_vswing_preemph *block) { > + union intel_ddi_buf_trans_entry *entry; > + const u32 *tables = block->tables; > + u8 num_rows = 10; > + size_t offset = 0; > + const u32 *vals; > + > + for (int idx = 0; idx < block->num_tables; idx++) { > + for (int row = 0; row < num_rows; row++) { > + vals = &tables[offset]; > + > + entry = &bufs_mtrx[idx][row]; > + entry->icl.dw2_swing_sel = vals[0]; > + entry->icl.dw7_n_scalar = vals[1]; > + entry->icl.dw4_cursor_coeff = vals[2]; > + entry->icl.dw4_post_cursor_2 = vals[3]; > + entry->icl.dw4_post_cursor_1 = vals[4]; > + > + offset += block->num_columns; > + } > + } > +} > + > static void > parse_vswing_preemph_snps(union intel_ddi_buf_trans_entry **bufs_mtrx, > const struct bdb_vswing_preemph *block) @@ - > 2262,6 +2288,11 @@ parse_vswing_preemph_override(struct intel_display > *display) > parse_vswing_preemph_lt(bufs_mtrx, block); > } else if (DISPLAY_VER(display) >= 14) { > parse_vswing_preemph_snps(bufs_mtrx, block); > + } else if (DISPLAY_VER(display) == 11) { > + if (display->platform.elkhartlake) > + parse_vswing_preemph_icl(bufs_mtrx, block); > + else > + drm_dbg_kms(display->drm, "VS/PE-O parsing not yet > supported\n"); > } else { > drm_dbg_kms(display->drm, "VS/PE-O parsing not yet > supported\n"); > } > @@ -2726,6 +2757,9 @@ static void override_vswing_preemph(struct > intel_bios_encoder_data *devdata) > parseable = true; > } else if (DISPLAY_VER(display) >= 14) { > parseable = true; > + } else if (DISPLAY_VER(display) == 11) { > + if (display->platform.elkhartlake) > + parseable = true; > } > > if (!parseable) > diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h > b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h > index a8c998fa339e6..bfb6de45a94e2 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h > +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h > @@ -25,11 +25,11 @@ struct bxt_ddi_buf_trans { }; > > struct icl_ddi_buf_trans { > - u8 dw2_swing_sel; > - u8 dw7_n_scalar; > - u8 dw4_cursor_coeff; > - u8 dw4_post_cursor_2; > - u8 dw4_post_cursor_1; > + u32 dw2_swing_sel; > + u32 dw7_n_scalar; > + u32 dw4_cursor_coeff; > + u32 dw4_post_cursor_2; > + u32 dw4_post_cursor_1; > }; > > struct icl_mg_phy_ddi_buf_trans { > -- > 2.45.2
