> Subject: [PATCH v3 20/31] drm/i915/bios: shrink all Snps's VS/PE tables > > Each value present in Snps's VS/PE-O table is stored on u32. In order to match > values' size this causes dg2_snps_phy_buf_trans to increase it's size. > > Nevertheless, the actual value from each Snps's VS/PE-O table is fully encoded > in the lowest byte. Extract the lowest byte by casting to u8 and using it as > deparsed value. This way there is no need to inflate default tables.
Same thing here squash patches 19, 20 Regards, Suraj Kandpal > > Signed-off-by: Michał Grzelak <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_bios.c | 6 +++--- > drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h | 6 +++--- > 2 files changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c > b/drivers/gpu/drm/i915/display/intel_bios.c > index 2d556889316f0..c6a53319809ee 100644 > --- a/drivers/gpu/drm/i915/display/intel_bios.c > +++ b/drivers/gpu/drm/i915/display/intel_bios.c > @@ -2202,9 +2202,9 @@ parse_vswing_preemph_snps(union > intel_ddi_buf_trans_entry **bufs_mtrx, > vals = &tables[offset]; > > entry = &bufs_mtrx[idx][row]; > - entry->snps.vswing = vals[0]; > - entry->snps.pre_cursor = vals[1]; > - entry->snps.post_cursor = vals[2]; > + entry->snps.vswing = (u8) vals[0]; > + entry->snps.pre_cursor = (u8) vals[1]; > + entry->snps.post_cursor = (u8) vals[2]; > > offset += block->num_columns; > } > diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h > b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h > index 1b48d66189ede..30fafeeaf62f2 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h > +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h > @@ -45,9 +45,9 @@ struct tgl_dkl_phy_ddi_buf_trans { }; > > struct dg2_snps_phy_buf_trans { > - u32 vswing; > - u32 pre_cursor; > - u32 post_cursor; > + u8 vswing; > + u8 pre_cursor; > + u8 post_cursor; > }; > > struct xe3plpd_lt_phy_buf_trans { > -- > 2.45.2
