From: Antonios Motakis <[email protected]>

The previous version of the macro allows for more false positives
than necessary.

Replace the macro with IS_PSCI_32 and IS_PSCI_UBOOT macros, that
explicitly check for the 32 bit PSCI IDs, and the PSCI 0.1 IDs
used by uboot. ARMv8 will need an additinal check for the IDs
of 64 bit PSCI functions.

Signed-off-by: Antonios Motakis <[email protected]>
---
 hypervisor/arch/arm/include/asm/psci.h | 3 ++-
 hypervisor/arch/arm/traps.c            | 4 ++--
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/hypervisor/arch/arm/include/asm/psci.h 
b/hypervisor/arch/arm/include/asm/psci.h
index 43a9c65..dc8c007 100644
--- a/hypervisor/arch/arm/include/asm/psci.h
+++ b/hypervisor/arch/arm/include/asm/psci.h
@@ -46,7 +46,8 @@
 #define PSCI_CPU_IS_ON         0
 #define PSCI_CPU_IS_OFF                1
 
-#define IS_PSCI_FN(hvc)                ((((hvc) >> 24) & 0x84) == 0x84)
+#define IS_PSCI_32(hvc)                (((hvc) >> 24) == 0x84)
+#define IS_PSCI_UBOOT(hvc)     (((hvc) >> 8) == 0x95c1ba)
 
 #define PSCI_INVALID_ADDRESS   0xffffffff
 
diff --git a/hypervisor/arch/arm/traps.c b/hypervisor/arch/arm/traps.c
index 71246e9..ae0990f 100644
--- a/hypervisor/arch/arm/traps.c
+++ b/hypervisor/arch/arm/traps.c
@@ -209,7 +209,7 @@ static int arch_handle_smc(struct trap_context *ctx)
 {
        unsigned long *regs = ctx->regs;
 
-       if (IS_PSCI_FN(regs[0]))
+       if (IS_PSCI_32(regs[0]) || IS_PSCI_UBOOT(regs[0]))
                regs[0] = psci_dispatch(ctx);
        else
                regs[0] = smc(regs[0], regs[1], regs[2], regs[3]);
@@ -223,7 +223,7 @@ static int arch_handle_hvc(struct trap_context *ctx)
 {
        unsigned long *regs = ctx->regs;
 
-       if (IS_PSCI_FN(regs[0]))
+       if (IS_PSCI_32(regs[0]) || IS_PSCI_UBOOT(regs[0]))
                regs[0] = psci_dispatch(ctx);
        else
                regs[0] = hypercall(regs[0], regs[1], regs[2]);
-- 
2.8.0.rc3


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