On 2016-06-23 20:37, Jan Kiszka wrote:
> On 2016-06-23 10:27, Jan Kiszka wrote:
>> I've merged this series with two modifications (build fix for patch 8,
>> slight refactoring of patch 10) into next. I've also rebased my
>> wip/arm64 mirror with the remaining patches on top (trivial conflict in
>> .travis.yml). Still works on ARM, tests on the Seattle pending.
> 
> Bad news: there seems to be a regression with my branch compared to a
> state from February: interrupts no longer work for the second NIC when
> assigned to a non-root Linux cell. Does this work for you?

Interestingly, the UART does generate some:

# cat /proc/interrupts
           CPU0       CPU1
  1:          0          0       GIC  29 Edge      arch_timer
  2:       1263       1307       GIC  30 Edge      arch_timer
  3:        104          0       GIC 360 Level     uart-pl011
  4:          0          0       GIC 354 Level     eth0-pcs
  5:          0          0       GIC 356 Level     eth0
  6:          0          0       GIC 373 Edge      eth0-TxRx-0
  7:          0          0       GIC 374 Edge      eth0-TxRx-1

Please cross-check, then we can decide who may do some bisecting... :-/

Jan

-- 
Siemens AG, Corporate Technology, CT RDA ITP SES-DE
Corporate Competence Center Embedded Linux

-- 
You received this message because you are subscribed to the Google Groups 
"Jailhouse" group.
To unsubscribe from this group and stop receiving emails from it, send an email 
to [email protected].
For more options, visit https://groups.google.com/d/optout.

Reply via email to