On 2016-06-17 21:10, [email protected] wrote: > From: Antonios Motakis <[email protected]> > > This patch series has been split off from the main Jailhouse for > AArch64 patch series, in order to keep each series shorter. > > In this series, a few changes are included to the core in > preparation to the main patch series. In addition, most of the > patches are on the ARM AArch32 architecture port of Jailhouse. > Since the AArch64 port attempts to share some code with AArch32, > a few changes and code moves are needed. > > Changes from v2: > - Many minor touch ups... > Changes from v1: > - Dropped TLB related patch from the series, as this part might > still need more significant changes > - Mostly minor code improvements > > Antonios Motakis (10): > driver: ioremap the hypervisor firmware to any kernel address > core: make phys_processor_id() return unsigned long > core: panic_stop: print current cell only if it has been set > arm: pass SPIs with large ids to the root cell > arm: psci: support multiple affinity levels in MPIDR > arm: replace IS_PSCI_FN macro with more explicit versions > arm: move the handle_irq_route function to the GICv3 module > arm: prepare port for 48 bit PARange support > arm: put the value of VTCR for cells in a define > arm: hide TLB flush behind a macro > > Claudio Fontana (1): > core: lib: replace ARM memcpy implementation with generic version > > Dmitry Voytik (1): > driver: sync I-cache, D-cache and memory > > Jan Kiszka (1): > core: Add support for aligned page allocation > > driver/cell.c | 9 +++ > driver/main.c | 25 ++++++- > hypervisor/arch/arm/gic-common.c | 43 +----------- > hypervisor/arch/arm/gic-v3.c | 40 +++++++++++ > hypervisor/arch/arm/include/asm/control.h | 1 + > hypervisor/arch/arm/include/asm/gic_common.h | 1 - > hypervisor/arch/arm/include/asm/gic_v3.h | 3 + > .../arch/arm/include/asm/jailhouse_hypercall.h | 1 + > hypervisor/arch/arm/include/asm/paging.h | 28 ++++++-- > hypervisor/arch/arm/include/asm/paging_modes.h | 5 +- > hypervisor/arch/arm/include/asm/percpu.h | 1 + > hypervisor/arch/arm/include/asm/processor.h | 2 + > hypervisor/arch/arm/include/asm/psci.h | 3 +- > hypervisor/arch/arm/irqchip.c | 2 +- > hypervisor/arch/arm/lib.c | 20 +++--- > hypervisor/arch/arm/mmu_cell.c | 17 ++--- > hypervisor/arch/arm/paging.c | 82 > +++++++++++++++++++++- > hypervisor/arch/arm/psci.c | 5 +- > hypervisor/arch/arm/setup.c | 1 + > hypervisor/arch/arm/traps.c | 4 +- > hypervisor/arch/x86/apic.c | 4 +- > hypervisor/arch/x86/control.c | 2 +- > .../arch/x86/include/asm/jailhouse_hypercall.h | 3 +- > hypervisor/arch/x86/include/asm/paging.h | 3 +- > hypervisor/control.c | 4 +- > hypervisor/include/jailhouse/paging.h | 1 + > hypervisor/include/jailhouse/printk.h | 2 +- > hypervisor/include/jailhouse/processor.h | 2 +- > hypervisor/lib.c | 10 +++ > hypervisor/paging.c | 60 +++++++++++++--- > hypervisor/printk.c | 4 +- > hypervisor/setup.c | 2 +- > 32 files changed, 291 insertions(+), 99 deletions(-) >
I've merged this series with two modifications (build fix for patch 8, slight refactoring of patch 10) into next. I've also rebased my wip/arm64 mirror with the remaining patches on top (trivial conflict in .travis.yml). Still works on ARM, tests on the Seattle pending. Still need to read the other two series. Thanks, Jan -- Siemens AG, Corporate Technology, CT RDA ITP SES-DE Corporate Competence Center Embedded Linux -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
