From: Jan Kiszka <[email protected]>

What we do on GICD_SGIR in GICv3 mode with affinity routing on is not
obvious. Leave a comment.

Signed-off-by: Jan Kiszka <[email protected]>
---
 hypervisor/arch/arm-common/irqchip.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/hypervisor/arch/arm-common/irqchip.c 
b/hypervisor/arch/arm-common/irqchip.c
index 89097ef2..6ce56b21 100644
--- a/hypervisor/arch/arm-common/irqchip.c
+++ b/hypervisor/arch/arm-common/irqchip.c
@@ -155,6 +155,11 @@ void gic_handle_sgir_write(struct sgi *sgi, bool 
virt_input)
                                 * physical CPU IDs, so there is no need to
                                 * translate them to the hypervisor's virtual
                                 * IDs.
+                                *
+                                * If we end up here in GICv3 mode, ie. with
+                                * affinity routing enabled, the cpu map will
+                                * be empty, and we will do nothing - just like
+                                * the spec demands.
                                 */
                                if (!(targets & gicv2_target_cpu_map[cpu]))
                                        continue;
-- 
2.12.3

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