On Fri, 31 Jan 2014, Chuck McManis wrote:
# You start running into contention for the AHB bus. This is exactly where
# I'm stuck between an FPGA and a hard place :-) Basically as you start
# running code, the fetches from RAM can interfere with the DMA. There are
# a few things you can do, One there is a memory space (CCM 64K) which
# isn't on any of the RAM busses. I found putting my stack there for
# processes helped. But you can't DMA to/from that memory. Really just the
# CPU can talk to it. There are chunks of memory that have special access
# to the DMA which facilite higher performance on the '407 there is some
# 22K or so reserved for the Ethernet peripheral which mitigates this same
# sort of problem.
Yeah, right after I posted this and went for lunch it occurred to
me.. the DMA is freeing up the cpu for work, but the cpu is limited to
non-sram operations half the time. Given VGA is so busy, it means the DMA
is almost constantly on.
I'll fiddle with the FIFO see if that helps, moving stack is a
neat idea, and its possible I could try to time things between DMAs though
that will really make the code ugly; I'm trying to keep things simple and
hackable, so others might find it interesting or a neat 'kit' .. ie: Can
use a do it all SoC easy enough, but rolling VGA in software is so we can
all learn from it.
But timing (say) a screen blit DMA between screen refresh DMAs,
means a lot of small fragments queueing up, crazy callback chains etc ..
not very informative to anyone.
Time to get really into the datasheets..
... or maybe add external RAM, if its different bus (or bitbang
it.) I've actually got external ram for another mcu to use, and was
debating trying to ride the STM32 on the same RAM for fun, with timing
games to keep them from colliding. It might out to be the savior here, but
a level of complexity I was debating avoiding..
jeff
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