> I have seen the interrupts on the i210 get stuck when stressing the
> input time stamp function with a 1 kHz input.  The interrupts simply
> stop triggering.  But your issue sounds different.
> Thanks,
> Richard

I suspect this may have something to do with double acknowledging the 
interrupts in igb_tsync_interrupt().

The TSICR register is read at the start of the interrupt handler, and then 
written at the end to acknowledge the interrupt(s). According to 8.16.1 (TSICR 
register) of the i210 datasheet however:

"Once ICR.Time_Sync is set, the internal value of this register (TSICR) should 
be cleared by writing 1b to all bits or cleared by a read to enable receiving 
an additional ICR.Time_Sync interrupt.”

So reading the TSICR register acknowledges the interrupt and clears the 
register. If another tsync interrupt occurs while in the interrupt handler, the 
second interrupt could be acknowledged without having been handled.

I tested this briefly by commenting out the TSICR write, and RX and TX 
timestamps are still processed correctly by ptp4l etc.

I can’t be sure this is the cause of the 1kHz input time stamp problem, but I 
was experiencing similar problems with the timers (alarms) that I have been 
working on, and this was the cause of that.

Thanks, Kieran.

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