On Tue, Oct 18, 2016 at 05:19:51PM +0100, Kieran Tyrrell wrote:
> So reading the TSICR register acknowledges the interrupt and clears the
> register. If another tsync interrupt occurs while in the interrupt handler,
> the second interrupt could be acknowledged without having been handled.
>
The igb driver is doing this on purpose. See this thread:
https://www.spinics.net/lists/netdev/msg237642.html
The extra ack is a work around for the 82580. Sounds like the i210
doesn't have this problem. If the double ack is causing missed
interrupts, then it really should be fixed in mainline.
Thanks,
Richard
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