Just found some time to test texcoords and i found 1 problem.
Whit my last patch "Flick-BFC-COL-Fix-PSIZ.diff" when PSIZ woes enabled
texcoords would bee set incorrectly.
Here is a new patch that fixes that.
I am not certain about the part where i change R300_RS_CNTL_0 when back
face coloring is enabled. But it makes some demo's run better for me.
The rest should bee fine.
diff --git a/src/mesa/drivers/dri/r300/r300_emit.c b/src/mesa/drivers/dri/r300/r300_emit.c
index 424bf44..02a3090 100644
--- a/src/mesa/drivers/dri/r300/r300_emit.c
+++ b/src/mesa/drivers/dri/r300/r300_emit.c
@@ -293,8 +293,7 @@ GLuint r300VAPOutputCntl0(GLcontext * ctx, GLuint OutputsWritten)
if (OutputsWritten & (1 << VERT_RESULT_HPOS))
ret |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT;
- if (OutputsWritten & (1 << VERT_RESULT_COL0))
- ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT;
+ ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT; // Wee always have color0 enabled.
if (OutputsWritten & (1 << VERT_RESULT_COL1))
ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT;
@@ -306,12 +305,13 @@ GLuint r300VAPOutputCntl0(GLcontext * ctx, GLuint OutputsWritten)
R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT |
R300_VAP_OUTPUT_VTX_FMT_0__COLOR_3_PRESENT;
+ if (OutputsWritten & (1 << VERT_RESULT_PSIZ))
+ ret |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT;
+
#if 0
if (OutputsWritten & (1 << VERT_RESULT_FOGC)) ;
-#endif
- if (OutputsWritten & (1 << VERT_RESULT_PSIZ))
- ret |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT;
+#endif
return ret;
}
diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index 48d92da..6dde941 100644
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -1471,13 +1471,10 @@ static void r300SetupRSUnit(GLcontext * ctx)
}
if (InputsRead & FRAG_BIT_COL0) {
- if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
- r300->hw.rr.cmd[R300_RR_ROUTE_0] |= 0 | R300_RS_ROUTE_0_COLOR | (fp_reg++ << R300_RS_ROUTE_0_COLOR_DEST_SHIFT);
- InputsRead &= ~FRAG_BIT_COL0;
- col_interp_nr++;
- } else {
- WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
- }
+ // Wee always have COL0 in vertex program output.
+ r300->hw.rr.cmd[R300_RR_ROUTE_0] |= 0 | R300_RS_ROUTE_0_COLOR | (fp_reg++ << R300_RS_ROUTE_0_COLOR_DEST_SHIFT);
+ InputsRead &= ~FRAG_BIT_COL0;
+ col_interp_nr++;
}
if (InputsRead & FRAG_BIT_COL1) {
@@ -1498,9 +1495,16 @@ static void r300SetupRSUnit(GLcontext * ctx)
col_interp_nr++;
}
- r300->hw.rc.cmd[1] = 0 | (in_texcoords << R300_RS_CNTL_TC_CNT_SHIFT)
- | (col_interp_nr << R300_RS_CNTL_CI_CNT_SHIFT)
- | R300_RS_CNTL_0_UNKNOWN_18;
+ if(R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_BFC0, -1) ||
+ R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_BFC1, -1)){
+ r300->hw.rc.cmd[1] = 0 | (in_texcoords << R300_RS_CNTL_TC_CNT_SHIFT)
+ | (col_interp_nr << (R300_RS_CNTL_CI_CNT_SHIFT+1))
+ | R300_RS_CNTL_0_UNKNOWN_18;
+ }else{
+ r300->hw.rc.cmd[1] = 0 | (in_texcoords << R300_RS_CNTL_TC_CNT_SHIFT)
+ | (col_interp_nr << R300_RS_CNTL_CI_CNT_SHIFT)
+ | R300_RS_CNTL_0_UNKNOWN_18;
+ }
assert(high_rr >= 0);
r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R300_RS_ROUTE_0, high_rr + 1);
diff --git a/src/mesa/drivers/dri/r300/r300_vertprog.c b/src/mesa/drivers/dri/r300/r300_vertprog.c
index d5cae47..df02b5e 100644
--- a/src/mesa/drivers/dri/r300/r300_vertprog.c
+++ b/src/mesa/drivers/dri/r300/r300_vertprog.c
@@ -438,37 +438,33 @@ static void r300TranslateVertexShader(struct r300_vertex_program *vp,
assert(vp->key.OutputsWritten & (1 << VERT_RESULT_HPOS));
/* Assign outputs */
- if (vp->key.OutputsWritten & (1 << VERT_RESULT_HPOS)) {
- vp->outputs[VERT_RESULT_HPOS] = cur_reg;
- cur_reg = 1;
- }
+ if (vp->key.OutputsWritten & (1 << VERT_RESULT_HPOS))
+ vp->outputs[VERT_RESULT_HPOS] = cur_reg++;
- if (vp->key.OutputsWritten & (1 << VERT_RESULT_COL0)) {
- vp->outputs[VERT_RESULT_COL0] = 1;
- cur_reg = 2;
- }
+ if (vp->key.OutputsWritten & (1 << VERT_RESULT_PSIZ))
+ vp->outputs[VERT_RESULT_PSIZ] = cur_reg++;
+
+ vp->outputs[VERT_RESULT_COL0] = cur_reg++;
if (vp->key.OutputsWritten & (1 << VERT_RESULT_COL1)) {
- vp->outputs[VERT_RESULT_COL1] = 2;
- cur_reg = 3;
+ vp->outputs[VERT_RESULT_COL1] = vp->outputs[VERT_RESULT_COL0]+1;
+ cur_reg = vp->outputs[VERT_RESULT_COL1]+1;
}
if (vp->key.OutputsWritten & (1 << VERT_RESULT_BFC0)) {
- vp->outputs[VERT_RESULT_BFC0] = 3;
- cur_reg = 5;
+ vp->outputs[VERT_RESULT_BFC0] = vp->outputs[VERT_RESULT_COL0]+2;
+ cur_reg = vp->outputs[VERT_RESULT_COL0]+3+1;
}
if (vp->key.OutputsWritten & (1 << VERT_RESULT_BFC1)) {
- vp->outputs[VERT_RESULT_BFC1] = 4;
- cur_reg = 5;
+ vp->outputs[VERT_RESULT_BFC1] = vp->outputs[VERT_RESULT_COL0]+3;
+ cur_reg = vp->outputs[VERT_RESULT_BFC1]+1;
}
#if 0 /* Not supported yet */
if (vp->key.OutputsWritten & (1 << VERT_RESULT_FOGC))
vp->outputs[VERT_RESULT_FOGC] = cur_reg++;
-#endif
- if (vp->key.OutputsWritten & (1 << VERT_RESULT_PSIZ))
- vp->outputs[VERT_RESULT_PSIZ] = cur_reg++;
+#endif
for (i = VERT_RESULT_TEX0; i <= VERT_RESULT_TEX7; i++)
if (vp->key.OutputsWritten & (1 << i)) {
@@ -1054,6 +1050,26 @@ static void r300TranslateVertexShader(struct r300_vertex_program *vp,
}
next:;
}
+ if (!(vp->key.OutputsWritten & (1 << VERT_RESULT_COL0))) {
+ src[2].File = PROGRAM_TEMPORARY;
+ src[2].Index = u_temp_i;
+ src[2].RelAddr = 0;
+ u_temp_i--;
+ // Wee need COL0 in vertex program output
+ o_inst->op =
+ MAKE_VSF_OP(R300_VPI_OUT_OP_ADD,
+ vp->outputs[VERT_RESULT_COL0],
+ VSF_FLAG_ALL,
+ VSF_OUT_CLASS_RESULT);
+
+ o_inst->src[0] = MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), \
+ SWIZZLE_ZERO, SWIZZLE_ZERO, \
+ SWIZZLE_ZERO, SWIZZLE_ONE, \
+ t_src_class(src[0].File), VSF_FLAG_NONE) | (src[0].RelAddr << 4);
+ o_inst->src[1] = ZERO_SRC_2;
+ o_inst->src[2] = ZERO_SRC_2;
+ o_inst++;
+ }
/* Will most likely segfault before we get here... fix later. */
if (o_inst - vp->program.body.i >= VSF_MAX_FRAGMENT_LENGTH / 4) {
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