Jerome Glisse wrote: >> First, I want to know what others think of the theory. I have >> attached my patch to the i915tex_privbuffers branch driver below. >> If there are any architectural issues with my approach I would >> surely be interested to here them and how they might be addressed. >> > Theory is mostly good however i see a couple of issues. First the big > one is that you put to much things in the driver, in fact this > limitation would be better worked out in core mesa without having to > touch the driver. Mainly because every driver otherwise will have to > duplicate the code and i believe this somethings that should be > avoided. Moreover i think it will be easier and cleaner to hack this > into mesa because mesa have a better view of what is going on, i will > balance this a bit as there is still need for some card information > more below. This is probably true, would be nice if there would be support for it outside a specific driver. Should be possible to integrate much better with softpipe I think, but it's not quite ready.
> Now, here is the tricky part, card have CRTC limits so you will > either have to work around those too or just accept them (for "older" > card this limit is greater than 3d limit so you might be happy with > them). Other big problem is when cutting a big frame buffer and > render too it, you will have to ask the driver to tell you where and > how to split the big frame buffer in smaller chunk (and i think this > should be the only driver specific thing) and that might even be not > possible (i would have to hack a bit on some card to test this) in > some case: for instance if you got a tiled frame buffer, i am not > sure you can render properly to several small part of a big buffer > using tiles as there might be side effect at borders of small buffers > as i believe 3d render buffer have some memory alignment (needing > stride). And if you render big frame buffer i am sure you do not want > to loose tiles speed boost. As long as you satisfy requirements for tiling it should work - note that the i915tex_privbuffers branch currently doesn't support tiling at all. It should even be possible to use one tiled and one untiled buffer (to preserve memory) I suppose in theory, but it's probably not worth the trouble... Roland ------------------------------------------------------------------------- This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ _______________________________________________ Mesa3d-dev mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/mesa3d-dev
