On Thu, 2009-01-29 at 15:08 -0800, Eric Anholt wrote: > We can support any combination of (a8r8g8b8, x8r8g8b8, r5g6b5) x > (z0,z24,z24s8) > on either class of chipsets. The only restriction is no mixing bpp when also > mixing tiling. This shouldn't be occurring currently.
Slightly hijacking, since this isn't a direct comment on the above patch.. I think it might be useful to expose some combinations with 0 alpha bits. If we don't, there is no obvious way of flagging when you're mapping a 24bit depth X Pixmap onto a texture. The setTexBuffer hook can look at the fbconfig of the GLXPixmap the texture is targeting, but can't (as far as I could figure out) inspect what format the X server knows the data is in (we have "cpp" from DRI2, but that doesn't tell us if the alpha channel is used or not). -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) ------------------------------------------------------------------------------ This SF.net email is sponsored by: SourcForge Community SourceForge wants to tell your story. http://p.sf.net/sfu/sf-spreadtheword _______________________________________________ Mesa3d-dev mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/mesa3d-dev
