On Mon, 21 Feb 2005 19:56:40 -0500, Daniel Phillips <[EMAIL PROTECTED]> wrote:
> On Monday 21 February 2005 16:20, Timothy Miller wrote:
> > I had mentioned earlier that I've been tied up with the business
> > aspects of the OGP, and I thought some of you might be interested in
> > hearing about what's going on and have some discussion on it.
> >
> > Our research indicates the best potential for success is with a
> > two-pronged approach.  One is to sell an ASIC in bulk for embedded
> > systems, and the other is a PCB-based version for retail.  As such,
> > we have turned our attention, for the moment, to the embedded market
> > where we and others feel that we can sell the highest volumes.  To
> > compete in that market, of course, we will have to develop an ASIC.
> > As such, that will likely be the new primary direction of the OGP.
> 
> Is it really a new direction?  The FPGA would still need to remain the
> primary focus of development, both to evolve quickly and reduce the
> frequency of ASIC bugs.

You are absolutely right.  There will, obviously, be some differences
between the FPGA and ASIC versions, but the idea is to make the
differences absolutely minmal.  95%, the ASIC version will simply be
the FPGA design, just faster and lower power.

On the FPGA board, the PCI controller will probably be separate.  But
in the ASIC, we'll simply glue the two units together with a
minimalist wrapper so as not to disturb the design of either one.

> 
> > The retail graphics board will be affected such that the board will
> > now sell with a much lower retail price.  Furthermore, we're looking
> > into the idea of selling the retail board through partners who
> > specialize in that so as to further reduce the price.  The result
> > will be a MUCH less expensive retail product.  There is also a
> > likelihood that we'll have greater freedom in terms of power
> > consumption versus speed.
> 
> Ah, that reminds me, a really big selling point for this card would be
> open power management specs, particularly if embedded is going to be a
> target market.

I envision a chart that lists conservative clock rates for no heat
sink, heat sink, fan cooling, and water cooling, with voltages and PLL
numbers.  These would be "we know it'll work" speeds, and if people
want to go faster, they can, but we don't guarantee it'll work.

> 
> > At the same time, we don't want to leave behind those who would like
> > to tinker.
> 
> Good to hear.  Also, don't forget the group that doesn't want to wait
> the extra time for an ASIC.  And the group that wants to support the
> project sooner rather than later by purchasing a card as a
> quasi-donation.

This market is made up of enthusiastic, technically aware people. 
Unfortunately, not everyone is technically aware, and not all
technically aware people will be interested.  That limits the volumes.
 Still, if all we wanted to do was do what's popular, we wouldn't be
here, now would we.  :)

> > In any case, we will have to design a prototype board,
> > and so our plan is to sell that as a product in its own right.  Some
> > changes to it include possibly separating the host controller out
> > into a separate chip so that you can reprogram the main FPGA as you
> > like without affecting your ability to reprogram it again.
> 
> That would be wonderful.  And can we now have the logic to reset/reload
> the FPGA entirely under software control?

Yeah, with the host controller in a separate chip, you'd even be able
to reprogram the FPGA without reprogramming the PROM first.

It'll be a little akward, since it would all be done through PCI config space.

> > Putting  it another way, the prototype will be designed with features
> > that lend themselves more effectively towards experimentation.  The
> > lower sales volumes of this product will increase its cost relative to
> > the original plan.  If, however, we get higher volume than expected,
> > the price will go down, especially for bulk orders.
> 
> The lower cost ASIC should be partly applied to subsidizing the cost of
> the FPGA boards.  This will certainly be a business win, by expanding
> the community of developers, alpha testers and general boosters.  

You make a good point, and we haven't forgotten it.  The point is that
the parts will be much more expensive.  And by productizing it, it has
to stand on its own as a profitable item.  We can't be Walmart that
sells detergent at a loss so that you'll buy other stuff while in
there.

> Also,
> please don't forget the possibility of a (community sponsored) donation
> program aimed at purchasing FPGA boards for developers.

Oh, we won't.  The new business plan doesn't count on it (everything
has to be conservative), but it would definitely be a factor
contributing to our success.

What do you say to the idea of there being a price break for boards
bought through donation versus retail?  We could do this in part
because we'd be able to collect money for a little while and then
produce a volume of cards that themselves are cheaper to produce due
to volume.

> > While prototypes and experimenter versions of the board will likely
> > be identical, they may or may not have the same sale price.  There
> > will be more than one prototype board, because we'll support various
> > interfaces including PCI, AGP, PC/104, and some others used in
> > embedded systems. (PCI Express will be a follow-on; we expect to use
> > an external chip to help with that.)  We need to guage how many
> > prototypes to make for the initial build.
> 
> Can we go to the XC3S4000 then?  We've already nearly eaten the 2000's
> entire multiplier budget in the rasterizer alone.  Without dedicated
> multiplliers, the fragment processor will bloat up and consume vast
> swaths of gates even with 8 bit arithmetic.  We really need some more
> dedicated multipliers.  I'm not saying it can't be done within the
> current confines but I suspect that with the 2000, the fragment
> processor is going to be a big bottleneck even for simple fixed
> function bilinear + alpha, and will bloat up so much that other
> important features such as RGB-YUV conversion will be pushed aside.

In short, yes.  The long answer is that we're going to design for a
tight budget anyhow.  It's possible that the first design will be
overly conservative, but that's better than blowing things completely
and not being able to produce a product.

But, yes, the change in direction does give us, POTENTIALLY, more
freedom in terms of transistor budget.
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