On Saturday 02 December 2006 04:44, Timothy Miller wrote: > On 12/1/06, Dieter <[EMAIL PROTECTED]> wrote: > > > If I understand it correctly, PCIe has independent read and write > > > paths for each channel. Does that mean we could actually be > > > doing a DMA upload and a DMA download at the same time? > > > > > > If so, under what circumstances might it be useful to us to be > > > doing transfers in both directions at the same time? > > > > > >From the Decoding HD mpeg thread in August: > > > > } > or you have to transfere back the data into host memory > > } > which makes the whole acceleration useless. > > > > } } It would be nice to be able to have access to the raw video > > data after a } } frame has been displayed. > > Ok, so you're talking about video decoding. There are a number of > such things that I have thought of. How about FPGA accelerated > [EMAIL PROTECTED] > > I'm thinking specifically of implementations of OGA. When would OGA > benefit from bidirectional transfers?
When you're recording a gameplay or desktop usage movie clip (i.e. for demonstration or instruction purposes) using e.g. FRAPS (http://www.fraps.com), you want to read back the rendered frames. On many cards this makes the system unusably slow. Reading back one frame while the next is being rendered and data for the one after that is being uploaded could help there. Lourens
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