Hi. A few questions about the General Purpose I/O Connector, P50E: - The connector is described as "100 Pin IDC Connector". Is a datasheet available of the connector which will be used? I would like to avoid any ambiguity as to pin numbering and mating connector.
- I assume the idea is to have OGD1 and daughterboard next to each other, with a 100-way flat cable running between them. What max. cable length would be "safe"/adviseable ? - The following three signals: SC_CLK, SCL_VSYNC, SC_BLANK* are on the connector but do not ring a bell here. What does SC_ stand for? - Is putting two OGD1's in the same PCI bus, connecting a flat cable between the IDC connectors, and running SLI/Crossfire over the flat cable a supported hardware configuration? Merely joking, of course :) regards, koen _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
