On 3/27/07, Koen De Vleeschauwer <[EMAIL PROTECTED]> wrote:
Correct. You need to provide this documentation, both human readable and UCF. For the General Purpose I/O Connector, I already know which FPGA pins correspond to which IDC connector pins. All it takes is the schematics and a felt tip marker. I just don't know which pin on the board is pin A1, which pin is pin B50.
I think the key for us will be to let the raw data trickle up to the artists on the list who can produce really nice diagrams that visually show what is otherwise difficult to understand in a netlist or schematic. -- Timothy Normand Miller http://www.cse.ohio-state.edu/~millerti Open Graphics Project _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
