Paul Brook wrote:
How much does SMP need direct hw support (cache coherency?), could this
be eliminated by sw ? (patching the kernel to assign processes to cpu
wisely?).
A multiprocessor machine without hardware cache coherency is extremely hard to
program, to the point of being useless for most real applications. You get
equally good results (for a fraction of the price) from a cluster with a fast
interconnect.
So, you could make a NUMA system on one board that was programed the
same as a cluster.
--
JRT
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