On Sunday 22 April 2007 11:04, James Richard Tyrer wrote: > Paul Brook wrote: > >> How much does SMP need direct hw support (cache coherency?), could this > >> be eliminated by sw ? (patching the kernel to assign processes to cpu > >> wisely?). > > > > A multiprocessor machine without hardware cache coherency is extremely > > hard to program, to the point of being useless for most real > > applications. You get equally good results (for a fraction of the price) > > from a cluster with a fast interconnect. > > So, you could make a NUMA system on one board that was programed the > same as a cluster.
You could, but it's going to be much more complicated and expensive, probably without any real performance benefit. Given your hypothetical non-coherent NUMA machine uses the same programming model as a cluster, it will be competing against high-end systems like Blue Gene and SiCortex, or for smaller setups just a bunch of blades with an infiniband or even gig-e interconnect. Paul _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
