On Sun, Aug 3, 2008 at 9:52 AM, Petter Urkedal <[EMAIL PROTECTED]> wrote: > On 2008-07-31, Timothy Normand Miller wrote: >> ## Ok, looks good. Now, we need the bypass mode. With HQ in place, >> we kinda have to have a register stage between the fifos. There are >> some shortcuts and cautions, however: > > I made a commit which adds in the bypass mode, roughly as you suggest. > >> assign hq2pci_cmd_deq = !hq2br_cmd_enq || !hq2br_cmd_full; > > This don't work for HQ, so hq2pci_cmd_deq I split up to signal: > assign hq2pci_cmd_deq = > hq2pci_cmd_deq_if_intercept > || hq2pci_cmd_deq_if_bypass && bypass_mode;
I don't know what is the order of operations of && and ||. What do you intend? I think I'd like to add some parentheses. > >> always @(posedge clock) begin >> // Only clear the enq if the queue doesn't say it's full. As long >> as the queue is full, it ignores enq, so you have to hold it on. >> if (!hq2br_cmd_full) hq2br_cmd_enq <= 0; > > Because of the !hq2br_cmd_full condition, hq2br_cmd_enq becomes > stateful, so I added reset logic to the whole block. I'm not sure if > the synthesizer can eliminate reset login for signals which don't need > it. There may be a better way to do this. When you do that, you need to add resets for every signal that is assigned in the block. What I do is split up the block into reset-needing and reset-not-needing blocks. > >> hq2br_cmd_enq <= pci2hq_cmd_valid; > > Changed to > > if (pci2hq_cmd_valid) > hq2br_cmd_enq <= 1; Yeah, if it's stateful, you need to do that because there's a leave-alone condition. -- Timothy Normand Miller http://www.cse.ohio-state.edu/~millerti Open Graphics Project _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
