On 2008-07-30, Timothy Normand Miller wrote: > > I don't think we can. val_or_addr comes directly from res_o of the ALU, > > which by the way already is MUXed after registration. > > Ok, then we'll just have to see how it goes. We'll wire it up and try it.
I submitted a revision which assumed the port read data is passed combinatorially back to HQ. You can find a matching but rather sketchy bridge wrapper on http://www.eideticdew.org/~urkedal/ogp/xp10_bridge_wrapper.v. It has a number of TODOs, CHECKMEs, and FIXMEs. In particular, I didn't find a signal from PCI which indicates the target of the command, and I wasn't sure how to indicate memory vs engine addresses to the bridge. _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
