On 2008-07-30, Petter Urkedal wrote: > One thing which is not clear to me is what to register at what needs to > be combinatorial. I think the critical part is reads. The input ports > needs to be decoded from the port address (val_or_addr) and fed back to > HQ and multiplexed into wb_val_o in one cycle, or is there another way?
Correction: The output wb_val_o is already muxed from data registered in oga1hq_stg4_memio. If we can afford another level of logic here, we can register the read-data before passing it back to HQ. (It may be tight on timing, since wb_val_o goes to register forwarding.) Otherwise, we could try to pass it combinatorially as a replacement for the current input_port placeholder. _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
