On 2008-07-31, Timothy Normand Miller wrote:
> ## Ok, looks good. Now, we need the bypass mode. With HQ in place,
> we kinda have to have a register stage between the fifos. There are
> some shortcuts and cautions, however:
I made a commit which adds in the bypass mode, roughly as you suggest.
> assign hq2pci_cmd_deq = !hq2br_cmd_enq || !hq2br_cmd_full;
This don't work for HQ, so hq2pci_cmd_deq I split up to signal:
assign hq2pci_cmd_deq =
hq2pci_cmd_deq_if_intercept
|| hq2pci_cmd_deq_if_bypass && bypass_mode;
> always @(posedge clock) begin
> // Only clear the enq if the queue doesn't say it's full. As long
> as the queue is full, it ignores enq, so you have to hold it on.
> if (!hq2br_cmd_full) hq2br_cmd_enq <= 0;
Because of the !hq2br_cmd_full condition, hq2br_cmd_enq becomes
stateful, so I added reset logic to the whole block. I'm not sure if
the synthesizer can eliminate reset login for signals which don't need
it. There may be a better way to do this.
> hq2br_cmd_enq <= pci2hq_cmd_valid;
Changed to
if (pci2hq_cmd_valid)
hq2br_cmd_enq <= 1;
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