[...] I can think of at least one use case, where I would particularly want to set explicit values in registers. And that is where I am exploring what the implications are of an architecture that initializes registers on reset.
> [...]
That's good news, I'm looking forward to a more flexible way of initialising the registers in the simulator.
However, in the mean time, I still think that or1ksim's current behaviour is a liability. Besides its own test suite, it's already caused trouble in the Linux port. It's just too risky to let it carry on clearing R0 on reset, as the main RTL implementation (the or1200 core) usually does not.
Instead of a random value, how about initialising all registers to a known 0x12345678 on reset? That should help catch most software issues in a repeatable way until the new configuration setting is in place. And even then, I would keep some non-zero register initialisation as the default setting.
Best regards, R. Diez _______________________________________________ OpenRISC mailing list [email protected] http://lists.openrisc.net/listinfo/openrisc
