On Tue, Apr 9, 2013 at 4:08 PM, Michel Stempin <[email protected]> wrote: > Hi John, > > Le 09/04/2013 21:13, [email protected] a écrit : >> Does any one actually have one of the TopLink minPCIe boards? Their >> datasheet doesn't clearly identify the pins. They have pins called >> LINK1, LINK2, LINK3, LINK4. It is not clear what those pins do. They >> only expose two of the Ethernet ports so there is no need for four >> link status pins. > > Not yet, but asked for their datasheet and comparing it to the RT5350 > Preliminary datasheet, trying to sort things out like you do! > > Yes, LINK0-4 are the 5 link status LED pins, but these can also be used for > bootstrapping configuration and as standard GPIO #22-26, respectively, see > table 1-4 in RT5350 datasheet. > > Regarding the remainging pins, according to same table: > - GPIO #17-21 also correspond to the JTAG pins > - UART_TX and UART_RX are probably GPIO #15-16, respectively > - GPIO #11-12 are clearly identified as such in the pinout > - I2SCLK can only be GPIO #7, according to table 1-5 > - SPI_CS1 is GPIO #27, and SP_CLK, SPI_MOSI and SPI_MISO are GPIO #4-6, > respectively (GPIO #3 is SPI_CS0 and is probably used onboard for selecting > the SPI Flash chip) > - I2C_SD and I2C_SCLK are GPIO #1-2, respectively > > CPURST_N is probably PORST_N and WLAN_LED is WLAN_LED_N. > > This leaves GPIO #0, GPIO #8-10 and GPIO #13-14 to implement TopLink pins > PWR_LED, SECU_LED, RST_PBC, WPS_LED and WPS_PBC. These can probably be > guessed by probing using /sys/class/gpio.
I sent my write up to them and asked them to fill in the blanks. I'm really hoping the the UART with RTS/CTS (GPIO 7/8/9/10) is exposed on the miniPCI version. I ordered 20 sample boards from them so they should answer me. > > > -Michel > >> >> On Mon, Apr 8, 2013 at 6:24 PM, Drasko DRASKOVIC >> <[email protected]> wrote: >>> Yes, >>> I have seen these boards and contacted suppliers. they seem really >>> responsive. >>> >>> I am missing some more flash though. 8MB is just enough, but it seems >>> like RT5350 chipset does not support more. >>> >>> John, >>> do you know what would be the best way to augment flash on these? Some >>> cheap NAND? SD Card? What would be the best solution? >>> >>> BR, >>> Drasko >>> >>> On Tue, Apr 9, 2013 at 12:21 AM, [email protected] <[email protected]> >>> wrote: >>>> It will be a while for the boards to arrive from China. But they look >>>> really good. 8MB flash, 32MB RAM for less than the $7.50 quotes on >>>> Aliaba. Chip antenna or IPEX. JTAG on connector >>>> >>>> The one with pins supports one Ethernet. The pseudo-miniPCIe one >>>> supports two Ethernet. >>>> >>>> On Mon, Apr 8, 2013 at 6:12 PM, Wojciech Kromer >>>> <[email protected]> wrote: >>>>> >>>>>> If so, >>>>>> then I can load it into RAM via JTAG, jump to it and get flash >>>>>> commands? That will let me initialize an empty flash. >>>>> >>>>> This scenario works fine with rt3352, just try... >>>>> >>>>>> Doesn't look like MIPS has the small SRAM region like ARM does. Is >>>>>> there a write up around somewhere on how to get going with a JTAG on >>>>>> these chips? >>>>> >>>>> I'm not very familiar with rt5350, but >>>>> DDRAM setup should be done with bootstrap pins like on rt3352, >>>>> so you can just try to use whole DDRAM. >>>>> >>>>> Best regards. >>>>> >>>>> _______________________________________________ >>>>> openwrt-devel mailing list >>>>> [email protected] >>>>> https://lists.openwrt.org/mailman/listinfo/openwrt-devel >>>> >>>> >>>> >>>> -- >>>> Jon Smirl >>>> [email protected] >>>> _______________________________________________ >>>> openwrt-devel mailing list >>>> [email protected] >>>> https://lists.openwrt.org/mailman/listinfo/openwrt-devel >>> _______________________________________________ >>> openwrt-devel mailing list >>> [email protected] >>> https://lists.openwrt.org/mailman/listinfo/openwrt-devel >> >> >> > _______________________________________________ > openwrt-devel mailing list > [email protected] > https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl [email protected] _______________________________________________ openwrt-devel mailing list [email protected] https://lists.openwrt.org/mailman/listinfo/openwrt-devel
