Igor,
Sorry for the late response, I was attending the PCB Design Conference
last week.
The solution I mentioned does not hide tracks, vias nor pads, it will
only hide the ratsnest for an unrouted net.
As for polygons on board revisions, I commonly will select and move
polygons a known distance outside of the board outline. Then move them back to
their previous location after edits are complete and repour them. This
eliminates the DRC highlighting and repouring issues when editing an existing
board.
Sincerely,
Brad Velander
Senior PCB Designer
Northern Airborne Technology
1925 Kirschner Rd.,
Kelowna, BC, V1Y 4N7.
tel (250) 763-2329 ext. 225
fax (250) 762-3374
-----Original Message-----
From: M P [mailto:[EMAIL PROTECTED]
Sent: Sunday, March 06, 2005 6:09 PM
To: [email protected]
Subject: RE: [PEDA] Analysing ground on large Polygon Pours.
Brad,
The question of analyzing GND came up on the forum several times and I
always thought it has to do with DRC as I never saw what other people
described. Thanks for clearing this out.
With polygon pours I agree with you if the new board is made. If a
modification of the existing board is done I prefer to keep existing
polygons and repour them at the end. There are other techniques, like hiding
the net. But hiding the net would hide all tracks of the hidden net, such as
fan-out tracks on the top/bottom layer, which I prefer to keep visible.
Regards,
Igor
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