This reminds me of the printed inductors. To minimize the DRC problems, when creating
your jumper footprint, make a miniature gap in the middle of it, like 1/2 mil thick.
This will solve the short-circuit constraint problem, but you will receive a trace gap
clearance error. Never the less, this will solve all the net related problems.
_____________
Brian Guralnick
----- Original Message -----
From: <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Thursday, July 12, 2001 4:03 PM
Subject: [PEDA] "Trace" jumpers generate DRC violations
| Protel is doing its job. I'm looking for a better way to do my job.
|
| I have a footprint which performs as a jumper for me. That is, two pads
| connected together by a trace. My schematic symbol for this part is two pins
| with different numbers.
|
| When I run a DRC on the board, Protel sees these pins shorted by the
| footprint and generates errors because the schematic doesn't have the two
| pins connected. In fact, it generates Short Circuit and Clearance Constraint
| errors for each part. I'm forced to sort through each of these errors. It
| takes time and I risk the possibility of missing a real problem.
|
| I considered wiring the two pins of my schematic symbol together; however,
| this wouldn't produce my desired result. I want to connect the two points
| through the footprint I created. Further, if the connection needs to be made
| to a plane then Protel would automatically connected all the points directly
| to the plane.
|
| Is there another option? or Do I just need to suck it up do a good job
| reviewing these connections manually?
|
|
| Thanks,
| Steve Allen
| Project Engineer
| Manufacturing Services, Inc.
|
|
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