Hi Steve.

The responses I have seen so far were in answer to the original dilemma of
joining analogue gnd and digital gnd at one point without DRC errors.  I
think this solution doesn't meet your requirements - tha is if I'm reading
your intentions correctly.

I have used these "shorted jumpers" before as hardwired default components
(instead of 0R0 resistors) which allow the engineer to change the
configuration by removing the tracked short with a blade to open the
connection, and still allow a solder blob or component to restore the short.
My method was more manual.  I do not use an autorouter so that was never an
issue.  The method I used, one that Steve mentioned, showed the short on the
schematic to get around the DRC issue, however this lead to interesting
ratsnests displayed on the PCB.  In short (no pun intended) whichever
direction you take will result in some compromise as it's not the norm,
unless Protel decides to introduce special rules for the odd strange uses we
impose on it.

Maybe you could use a variant on the solution to the original problem by
making the clearance of the short below the resolution of the Gerber
plotter, and above the DRC clearance detection capabilites of Protel s/w.
This maintains a suitably useable separation of the two pads of the jumper
should you need to use them as such.

I hope you can decipher something from this.

Cheers
Brendon.

----- Original Message -----
From: <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Friday, July 13, 2001 8:03 AM
Subject: [PEDA] "Trace" jumpers generate DRC violations


> Protel is doing its job.  I'm looking for a better way to do my job.
>
> I have a footprint which performs as a jumper for me.  That is, two pads
> connected together by a trace.  My schematic symbol for this part is two
pins
> with different numbers.
>
> When I run a DRC on the board, Protel sees these pins shorted by the
> footprint and generates errors because the schematic doesn't have the two

> pins connected.  In fact, it generates Short Circuit and Clearance
Constraint
> errors for each part.  I'm forced to sort through each of these errors.
It
> takes time and I risk the possibility of missing a real problem.
>
> I considered wiring the two pins of my schematic symbol together; however,
> this wouldn't produce my desired result. I want to connect the two points
> through the footprint I created.  Further, if the connection needs to be
made
> to a plane then Protel would automatically connected all the points
directly
> to the plane.
>
> Is there another option? or Do I just need to suck it up do a good job
> reviewing these connections manually?
>
>
> Thanks,
> Steve Allen
> Project Engineer
> Manufacturing Services, Inc.
>


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