At 04:03 PM 7/12/01 -0400, [EMAIL PROTECTED] wrote:
>Protel is doing its job.  I'm looking for a better way to do my job.

Yes. Some designers would just suffer through, perhaps cursing the program 
because it is limited in certain ways. But it is not as limited as it might 
seem, so the small risk of seeming ignorant or foolish here is more than 
balanced by the probability of learning something that, indeed, is "a 
better way."

>I have a footprint which performs as a jumper for me.  That is, two pads
>connected together by a trace.  My schematic symbol for this part is two pins
>with different numbers.

The part should match the schematic. There are better ways to accomplish 
what you want to do.

>When I run a DRC on the board, Protel sees these pins shorted by the
>footprint and generates errors because the schematic doesn't have the two
>pins connected.

As we would expect.

>   In fact, it generates Short Circuit and Clearance Constraint
>errors for each part.  I'm forced to sort through each of these errors.  It
>takes time and I risk the possibility of missing a real problem.

First of all, Mr. Allen is asking a very common question. It is covered in 
the FAQ. But to summarize:

(1) Make a footprint with two square pads. place a fill in between those 
pads such that there is a gap between the fill and the pads of 0.002 mils. 
Yes, 2 micro-inches. Make a footprint-scope design rule for the board which 
allows that footprint to contain gaps of 0.001 mils. This should work. If 
it does not, let us know.

HOWEVER, there can be some complications from board houses that see such a 
small gap in the gerbers and thoughtfully enlarge it. If they left it 
alone, it would not be on the film and it would not be on the final PCB, 
neither medium can create or sustain such a small gap. Normally, there 
would be *no* gap in the gerbers, however, it is possible that the Protel 
photoplot routines will truncate the pad size instead of rounding it off or 
otherwise assign apertures in a way that may cause trouble, i.e. a small 
gap that the fabricator might notice. One would be able to tell by 
examining the gerbers. Some gerber displays, note, will display a gap even 
if it is extremely small, much below the pixel size, maybe even zero. If 
the gap is still 1 pixel at maximum zoom, it may not be there at all.

A "zero gap" is two flashes in exact contact, no overlap and no distance.

(2) Make a footprint with an otherwise unused mech layer track shorting the 
two pads. Let's say that we want the short on the bottom layer. In the 
gerber setups, remove the bottom plot and make a new plot definition for 
the bottom layer, exactly the same as the normal one but check the mech 
layer you used so that it will be plotted with the shorting track. You 
could use the same mech layer for any number of shorts.

It might be tempting to eliminate the jumper entirely and just put a 
shorting track on the mech layer. Don't do it. Control the process from the 
schematic by using the jumper part, even if there is no actual part, and 
control the PCB part of the process by making the short part of the jumper 
footprint, so that if you move the footprint, the jumper will move with it.

Both methods will work, each has its advantages and disadvantages. I favor 
the first, perhaps because it's my baby, but I also invented the second, 
though others may have done or described it at other times. I would not 
have suggested the second path except for an isolated report of a bad board 
where, quite obviously, the fabricator had "corrected" the design. If a 
fabricator is being given a net list, it will be better to use method 2 -- 
because he will have no gap or adjacent flashes to fix, but even better to 
give the fabricator a merged net list, unless they have some way of dealing 
with single-point shorts.


[EMAIL PROTECTED]
Abdulrahman Lomax
P.O. Box 690
El Verano, CA 95433

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