How does one specify a Net not be routed,  but still be checked
for in the ERC?  I have a pretty simple 2 layer board.  2" X 2.7"
with a few parts on it.  I'm using P99SE SP6 on Win98

What I wanted to do was to route all the signal lines first and then poly pour
VCC/GND.  (This is a simple,  low speed, low cost, 2 layer design btw..)

Not seeing a direct way to do this,  I tried a few things like making
rules for VCC/GND nets to be 0 width traces.
If you do this,  when you do the pours,  you get whatever
the clearance is on both sides of a 0 width trace,  so you end up
with holes in the poly pour around a 0 length trace.   In a way what I
told it to do I guess,  but not what I really wanted...

Then I tried making the trace width impossibly large.  It's a 2" X 2.7"
board,  so I made the (min/max/pref) trace width all 5".  That
way it can't _possibly_ route those nets.... then I'll just do the poly
pour over it...  The router happily placed 3-4 VCC/GND tracks down
on the board.  At maybe 50-100 mil width.  This has to be a bug?
The router should not put down tracks that fail to meet the design
rules?

I also tried net unroute,  but this seems to just take out a segment
of the net,  and not the whole net (though I think this may have
worked in the past).  Even had this worked though,  the traces would
not have been as direct as they could have been without the VCC/GND nets in
the way.

Anyway,  I finished my board.  Wanted to report the router bug,  and
ask if there is a more direct path I can use for this next time.

---Phil

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