Hello all,

Wednesday, October 24, 2001 12:58 PM Douglas McDonald wrote:


> I've seen a mechanism for achieving this recently on another tool. You can
> add run-time attributes to each gate such as "GROUP=FPGA1" and then during
> annotation only parts with compatible attributes can/will be put together.
> This could also be very useful for defining components in isolated regions
> ie. "REGION=ISOLATED 5V" or some such. I'm not sure, but I think that the
> Protel database structure should be able to handle another field(s) -
> perhaps there's a DDB expert who could comment...

I think it is already in Protel, look in the 'handbookp99se.pdf' at page
142. You can find the file at www.protel.com. The pagenumber might be
different if Protel/Altium updated the file. Look for the subject 'Preparing
the Design for PCB Layout, Grouping parts into the same physical component'.


Aalt Lokhorst (e-mail [EMAIL PROTECTED])

address:
          Schut Geometrische Meettechniek bv
          Duinkerkenstraat 21
          9723 BN  Groningen, The Netherlands
          tel. +31 50-5877877
          fax. +31 50-5877899




* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* To post a message: mailto:[EMAIL PROTECTED]
*
* To leave this list visit:
* http://www.techservinc.com/protelusers/leave.html
*
* Contact the list manager:
* mailto:[EMAIL PROTECTED]
*
* Forum Guidelines Rules:
* http://www.techservinc.com/protelusers/forumrules.html
*
* Browse or Search previous postings:
* http://www.mail-archive.com/proteledaforum@techservinc.com
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *

Reply via email to