Richard:

Sorry, I guess I didn't read your posting well enough (once is not always
enough!).

We didn't need to worry about this stuff back in the days of TTL and
metal-gate CMOS.  I used to see big, long backplanes with big, bold tracks
on 2-sided PCBs, and big, long stubs (plug-in cards), and it was no problem.
Termination networks - what's that?

Until the "engineers" (not me, I was a tech then) doubled the clock rate (to
a whopping 5 MHz) on the new model - then when I plugged an extender card
into the backplane to diagnose a board, stuff quit working...

Best regards,
Ivan Baggett
Bagotronix Inc.
website:  www.bagotronix.com


----- Original Message -----
From: "Richard Sumner" <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Friday, September 27, 2002 11:57 AM
Subject: Re: [PEDA] OT: termination for a multidrop bidirectional bus


> Ivan,
>
> I agree completely. However I did note that clocks and strobes should be
> clean, perhaps not emphatically enough though!
>
> One way to reduce the overshoot on an unterminated trace is to really load
> the drivers. For example, by making the trace Z as low as you can (a wide
> trace and a small spacing to the ground plane).  Until the reflection
> returns, the driver sees the Z of the trace as the load.
>
> Richard


* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* To post a message: mailto:[EMAIL PROTECTED]
*
* To leave this list visit:
* http://www.techservinc.com/protelusers/leave.html
*
* Contact the list manager:
* mailto:[EMAIL PROTECTED]
*
* Forum Guidelines Rules:
* http://www.techservinc.com/protelusers/forumrules.html
*
* Browse or Search previous postings:
* http://www.mail-archive.com/proteledaforum@techservinc.com
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *

Reply via email to