Mr. Wilson has ably answered the questions, I have a little to add.

At 08:26 PM 12/15/2002, you wrote:
On 08:44 PM 15/12/2002 -0400, Tim Fifield said:
Can anyone explain the Lomax virtual short used for a GND neck and how it
would be used on an internal layer with 2 polygon planes? Can this be used
to result in no DRC violations? Also how do I keep the planes say 10 or 20
mil apart if allow for them to be much closer in the design rules for the
virtual short?
Consider making the shorting neck a component. Then you can apply the tiny clearance rule to just this component.
I *highly* recommmend making the short a component, because then short becomes schematic-controlled and self-documenting. You or a future designer can't forget about it without deleting the component from the schematic. (There is a device for keeping the component from appearing on the BOM, as I recall one simply leaves the TYPE field empty. The same device is used for grounded mounting holes, for example.)

Or you could position two rectangular pads close together, giving them suitable names. Then you can restrict the micro-clearance to just these named pads. Then track your neck in and out of these pads as you wish.
This would work, but I see no good reason to avoid using a netlisted component. It is "set and forget."

The general poly clearance is then preserved.
Either way. It is simplest, however, to set up a component scope clearance rule. Note that pad sizes and shapes should be such that the connecting tracks do not create a clearance violation in themselves.

Should the board house be made aware of the virtual short so they do not
remove the neck?
The one known problem with the so-called Lomax virtual short is that gerber generation under some conditions can break through the multiple defenses against open copper, which, when combined with an eager fabricator's desire to "fix" problems without consulting, can cause an open. So, yes, if you are going to use this technique, telling the fabricator can't hurt. "the two pads of JP27 are to be shorted together, not isolated."

Or one can use a different technique which I have myself come to favor:

Create an n-pin shorting component and place it on the schematic. (n is the number of nets to be shorted together at a single location, as with a star ground). The footprint for this component has n pads with normal clearance. On a dedicated mechanical layer, add track to the footprint which shorts the pads. Name this layer "shorting_jumpers". So when the footprint is called up it will automatically carry with it the shorts; but the shorts will not be seen by DRC as being copper.

Then remove one of the copper layers from the regular gerber plot definitions and create a special plot definition for that layer; merge plot the shorting_jumpers layer with that copper layer. I recommend using an outer layer (Top or Bottom) because it becomes possible to cut the short for test purposes. The pads for the same reason should be through-hole pads if possible; I'd use Berg pins/shorts for the flexibility of being able to add a regular shorting jumper during development.

One of the beauties of Protel 99SE was the provision of multiple gerber set-ups, all of which can be generated simultaneously with a single command. This is also useful, for example, with making assembly drawings or other drawings with format, where different mechanical layers are merged than one might use for, say, the fabrication films, where full drawing format is an expensive and useless addition.

The "virtual short" was invented before we were given the special plot-setup facilities....

PCAD has a device called a tie polygon, which is a polygon with multiple net assignments. However, this is an inferior solution, in my view, to either of the above, unless perhaps the tie polygon can be made part of a footprint and thus provides the same kind of automatic schematic-driven control as these two techniques.

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