Juha Kuusama wrote:

Let me define a few bypass schemes, like regular bypass cap, which connects from the supply line to the cap to the power pin.

I think your post indicates why a tool can not provide the functionality you are looking for. If you read any of the modern literature on designing high speed digital boards, you will find that that scheme is exactly the wrong way to do it. Now, I do not want to get into a long discussion on the theory of bypassing, but my feeling is that the system needs to provide the designer the tools to do the design rather than some programmer deciding how the design ought to be done.


Why can't I just assign bypass schemes to supply pins and have the computer to make the connections, collect the caps to a separate sheet (in order not to clutter the main sheet)...

How many caps per pin? How many pins per cap? What values? I do not mean to knock your post, but the decisionmaking that went into your suggestion is exactly the decisionmaking that seems to result in Altium deciding to jump into the FPGA market believing that it is a good idea.


If Altium would provide these, most people would switch, company policies allowing!

I think if Altium would decide that they have automated the bypassing process, it would be the last straw for many people who will realize that Altium has completely lost it.


Hamid




* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *

Reply via email to