>The solution is "Balanced Copper Thickness" throughout your design.
>
>Tom H 

Using a dummy polygon plane on each layer usually does a fine job, but, don't expect 
repair de-soldering to be easy with so much copper sinking the heat away from your 
application point.

_____________
Brian Guralnick


  ----- Original Message ----- 
  From: Tom Hausherr 
  To: 'Protel EDA Forum' 
  Sent: Wednesday, July 21, 2004 1:53 PM
  Subject: Re: [PEDA] Board warpage?


  Harry,

  I've seen every kind of layer stack-up imaginable.

  Board warpage is mainly caused by the uneven distribution of Copper
  Thickness. 

  If you have one plane that is out of order and call out 70um Copper
  Thickness (2OZ) your board will warp when the heat is applied either through
  fabrication lamination our plugging your assembled board into a voltage
  source.

  The solution is "Balanced Copper Thickness" throughout your design.

  Tom H 


  -----Original Message-----
  From: Harry Selfridge [mailto:[EMAIL PROTECTED]
  Sent: Wednesday, July 21, 2004 10:28 AM
  To: Protel EDA Forum
  Subject: Re: [PEDA] Board warpage?

  It isn't an odd number of PAIRS that causes problems - it is an odd number 
  of LAYERS.  There are some advanced fab techniques that can reliably 
  produce boards with odd number of planes or odd number of signal layers; 
  however, there are very few fabs I would trust to do it.  You can sometimes 
  get away with odd number stackups, but it will eventually bite you in the
  butt.

  Six layers is a common balanced stackup - provided there are an even number 
  of planes, and even number of signal layers with reasonably distributed
  copper.

  At 01:56 AM 7/21/04, you wrote:
  >SNIP
  >Some say that an odd number of layer pairs can cause problems, indeed we 
  >had problems with 6 layers at first, though we now use 6 layers to great 
  >success.  Problems with that were caused by bad process control, not the 
  >design (though the manufacturer tried to blame design at the time!!)
  SNIP 






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