Wow, that's fast....

I'll test it this evening and let you know.



On Tue, Jan 14, 2020 at 1:16 AM Marcel Kilgus via Ql-Users <> wrote:

> Peter Graf via Ql-Users wrote:
> >> When I did this thing there were no 128MB cards, so this could very
> >> well be it, yes. Will have to see what's different with them.
> > Maybe just an extra address or chip select line that needs a fixed level?
> Unfortunately nothing this easy, took me ages to understand what he
> did. A12/A11 are now multiplexed and also act as DQMH/DQML. These are
> never used at the same time, so he can do that, but it's weird to
> understand as of course there are no comments... and the SDRAM code is
> 100% mine, so I couldn't just take his changes to the original core.
> Anyway, I think I fixed it, new core is on the page. Of course I can
> only tell that it still works with the 32MB board ;)
> Marcel
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