CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: simonb Date: Fri Feb 26 02:01:16 UTC 2021 Modified Files: src/sys/arch/sparc64/include: vmparam.h Log Message: Say what 1UL<<39 (MAXDSIZ value) is in the comment. To generate a diff of this commit: cvs rdiff -u -r1.41 -r1.42 src/sys/arch/sparc64/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/vmparam.h diff -u src/sys/arch/sparc64/include/vmparam.h:1.41 src/sys/arch/sparc64/include/vmparam.h:1.42 --- src/sys/arch/sparc64/include/vmparam.h:1.41 Tue Oct 6 13:42:03 2020 +++ src/sys/arch/sparc64/include/vmparam.h Fri Feb 26 02:01:16 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.41 2020/10/06 13:42:03 christos Exp $ */ +/* $NetBSD: vmparam.h,v 1.42 2021/02/26 02:01:16 simonb Exp $ */ /* * Copyright (c) 1992, 1993 @@ -112,7 +112,7 @@ #define DFLDSIZ (128UL*1024*1024) /* initial data size limit */ #endif #ifndef MAXDSIZ -#define MAXDSIZ (1UL<<39) /* max data size */ +#define MAXDSIZ (1UL<<39) /* 512GB max data size */ /* * For processes not using topdown VA, we need to limit the data size - * they probably have not been compiled with the proper compiler memory
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: christos Date: Tue Mar 10 03:49:56 UTC 2020 Modified Files: src/sys/arch/sparc64/include: cpu.h Log Message: kill extra curproc/curlwp definitions that have no chance of working. To generate a diff of this commit: cvs rdiff -u -r1.129 -r1.130 src/sys/arch/sparc64/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/cpu.h diff -u src/sys/arch/sparc64/include/cpu.h:1.129 src/sys/arch/sparc64/include/cpu.h:1.130 --- src/sys/arch/sparc64/include/cpu.h:1.129 Sun Dec 29 16:09:27 2019 +++ src/sys/arch/sparc64/include/cpu.h Mon Mar 9 23:49:56 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.129 2019/12/29 21:09:27 martin Exp $ */ +/* $NetBSD: cpu.h,v 1.130 2020/03/10 03:49:56 christos Exp $ */ /* * Copyright (c) 1992, 1993 @@ -457,15 +457,5 @@ void kgdb_panic(void); int fixalign(struct lwp *, struct trapframe64 *); int emulinstr(vaddr_t, struct trapframe64 *); -#else /* _KERNEL */ - -/* - * XXX: provide some definitions for crash(8), probably can share - */ -#if defined(_KMEMUSER) -#define curcpu() (((struct cpu_info *)CPUINFO_VA)->ci_self) -#define curlwp curcpu()->ci_curlwp -#endif - #endif /* _KERNEL */ #endif /* _CPU_H_ */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: martin Date: Sun Dec 29 21:09:27 UTC 2019 Modified Files: src/sys/arch/sparc64/include: cpu.h Log Message: Simplify some macros: if we only ever use them on the local cpu, there is no need to do another pointer derefernence to go via the global address of our cpu info. Pointed out by ad. To generate a diff of this commit: cvs rdiff -u -r1.128 -r1.129 src/sys/arch/sparc64/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/cpu.h diff -u src/sys/arch/sparc64/include/cpu.h:1.128 src/sys/arch/sparc64/include/cpu.h:1.129 --- src/sys/arch/sparc64/include/cpu.h:1.128 Sun Dec 1 15:34:45 2019 +++ src/sys/arch/sparc64/include/cpu.h Sun Dec 29 21:09:27 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.128 2019/12/01 15:34:45 ad Exp $ */ +/* $NetBSD: cpu.h,v 1.129 2019/12/29 21:09:27 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -256,18 +256,21 @@ extern int sparc_ncpus; extern struct cpu_info *cpus; extern struct pool_cache *fpstate_cache; -#define curcpu() (((struct cpu_info *)CPUINFO_VA)->ci_self) +/* CURCPU_INT() a local (per CPU) view of our cpu_info */ +#define CURCPU_INT() ((struct cpu_info *)CPUINFO_VA) +/* in general we prefer the globaly visible pointer */ +#define curcpu() (CURCPU_INT()->ci_self) #define cpu_number() (curcpu()->ci_index) #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) #define CPU_INFO_ITERATOR int __unused #define CPU_INFO_FOREACH(cii, ci) ci = cpus; ci != NULL; ci = ci->ci_next -#define curlwp curcpu()->ci_curlwp -#define fplwp curcpu()->ci_fplwp -#define curpcb curcpu()->ci_cpcb - -#define want_ast curcpu()->ci_want_ast +/* these are only valid on the local cpu */ +#define curlwp CURCPU_INT()->ci_curlwp +#define fplwp CURCPU_INT()->ci_fplwp +#define curpcb CURCPU_INT()->ci_cpcb +#define want_ast CURCPU_INT()->ci_want_ast /* * definitions of cpu-dependent requirements
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Sat Apr 6 21:40:15 UTC 2019 Modified Files: src/sys/arch/sparc64/include: psl.h Log Message: The real cause for removing asm inline code on clang is that the "r" constraint cannot handle 64-bit and is treated as 32-bit. So code that refers to the upper 32-bit (manuf or impl) of the %ver register is removed by optimization. Use 32-bit kernel code as a workaround when referring to the %ver register. To generate a diff of this commit: cvs rdiff -u -r1.59 -r1.60 src/sys/arch/sparc64/include/psl.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/psl.h diff -u src/sys/arch/sparc64/include/psl.h:1.59 src/sys/arch/sparc64/include/psl.h:1.60 --- src/sys/arch/sparc64/include/psl.h:1.59 Fri Apr 5 12:15:41 2019 +++ src/sys/arch/sparc64/include/psl.h Sat Apr 6 21:40:15 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.59 2019/04/05 12:15:41 nakayama Exp $ */ +/* $NetBSD: psl.h,v 1.60 2019/04/06 21:40:15 nakayama Exp $ */ /* * Copyright (c) 1992, 1993 @@ -292,9 +292,8 @@ * Put "memory" to asm inline on sun4v to avoid issuing rdpr %ver * before checking cputyp as a result of code moving by compiler * optimization. - * For clang, to prevent it from being removed by optimization. */ -#if defined(SUN4V) || defined(__clang__) +#ifdef SUN4V #define constasm_clobbers "memory" #else #define constasm_clobbers @@ -323,11 +322,13 @@ static __inline void set##name(type _val __asm volatile(#wr " %0,0,%" #reg : : "r" (_val) : "memory"); \ } -#ifdef __arch64__ +/* + * XXX: clang's "r" constraint cannot handle 64-bit, + * so use 32-bit kernel code as a workaround. + */ +#if defined(__arch64__) && !defined(__clang__) #define SPARC64_RDCONST64_DEF(rd, name, reg) \ SPARC64_RDCONST_DEF(rd, name, reg, uint64_t) -#define SPARC64_RD64_DEF(rd, name, reg) SPARC64_RD_DEF(rd, name, reg, uint64_t) -#define SPARC64_WR64_DEF(wr, name, reg) SPARC64_WR_DEF(wr, name, reg, uint64_t) #else #define SPARC64_RDCONST64_DEF(rd, name, reg)\ static __inline __constfunc uint64_t get##name(void) \ @@ -337,6 +338,12 @@ static __inline __constfunc uint64_t get : "=r" (_hi), "=r" (_lo) : : constasm_clobbers); \ return ((uint64_t)_hi << 32) | _lo;\ } +#endif + +#ifdef __arch64__ +#define SPARC64_RD64_DEF(rd, name, reg) SPARC64_RD_DEF(rd, name, reg, uint64_t) +#define SPARC64_WR64_DEF(wr, name, reg) SPARC64_WR_DEF(wr, name, reg, uint64_t) +#else #define SPARC64_RD64_DEF(rd, name, reg) \ static __inline uint64_t get##name(void)\ { \
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Fri Apr 5 23:09:18 UTC 2019 Modified Files: src/sys/arch/sparc64/include: ctlreg.h Log Message: Redo previous. In the case of store variant, put dummy constraint in output instead of input. Suggested by joerg@ in source-changes-d@ To generate a diff of this commit: cvs rdiff -u -r1.65 -r1.66 src/sys/arch/sparc64/include/ctlreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/ctlreg.h diff -u src/sys/arch/sparc64/include/ctlreg.h:1.65 src/sys/arch/sparc64/include/ctlreg.h:1.66 --- src/sys/arch/sparc64/include/ctlreg.h:1.65 Fri Apr 5 12:16:13 2019 +++ src/sys/arch/sparc64/include/ctlreg.h Fri Apr 5 23:09:18 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: ctlreg.h,v 1.65 2019/04/05 12:16:13 nakayama Exp $ */ +/* $NetBSD: ctlreg.h,v 1.66 2019/04/05 23:09:18 nakayama Exp $ */ /* * Copyright (c) 1996-2002 Eduardo Horvath @@ -681,10 +681,10 @@ SPARC64_LD_DEF64(ldxa, uint64_t) /* 64-bit kernel, non-constant */ #define SPARC64_ST_NONCONST(st, type) \ __asm volatile( \ - "wr %2,%%g0,%%asi; "\ - #st " %0,[%1]%%asi "\ - : : "r" (value), "r" ((__uintptr_t)(loc)), \ - "r" (asi), "m" (*(type *)(__uintptr_t)(loc))) + "wr %3,%%g0,%%asi; "\ + #st " %1,[%2]%%asi "\ + : "=m" (*(type *)(__uintptr_t)(loc)) \ + : "r" (value), "r" ((__uintptr_t)(loc)), "r" (asi)) #if defined(__GNUC__) && defined(__OPTIMIZE__) #define SPARC64_ST_DEF(st, type) \ @@ -692,9 +692,10 @@ static __inline void st(paddr_t loc, int { \ if (__builtin_constant_p(asi)) \ __asm volatile( \ - #st " %0,[%1]%2 " \ - : : "r" (value), "r" ((__uintptr_t)(loc)), \ - "n" (asi), "m" (*(type *)(__uintptr_t)(loc))); \ + #st " %1,[%2]%3 " \ + : "=m" (*(type *)(__uintptr_t)(loc)) \ + : "r" (value), "r" ((__uintptr_t)(loc)), \ + "n" (asi)); \ else\ SPARC64_ST_NONCONST(st, type);\ }
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Fri Apr 5 12:16:13 UTC 2019 Modified Files: src/sys/arch/sparc64/include: ctlreg.h Log Message: Add dummy constraints to avoid excessive optimization in clang. GENERIC kernel compiled with clang now boot at least on my Fire V100. To generate a diff of this commit: cvs rdiff -u -r1.64 -r1.65 src/sys/arch/sparc64/include/ctlreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/ctlreg.h diff -u src/sys/arch/sparc64/include/ctlreg.h:1.64 src/sys/arch/sparc64/include/ctlreg.h:1.65 --- src/sys/arch/sparc64/include/ctlreg.h:1.64 Wed Dec 28 19:16:25 2016 +++ src/sys/arch/sparc64/include/ctlreg.h Fri Apr 5 12:16:13 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: ctlreg.h,v 1.64 2016/12/28 19:16:25 martin Exp $ */ +/* $NetBSD: ctlreg.h,v 1.65 2019/04/05 12:16:13 nakayama Exp $ */ /* * Copyright (c) 1996-2002 Eduardo Horvath @@ -485,12 +485,13 @@ #ifdef __arch64__ /* 64-bit kernel, non-constant */ -#define SPARC64_LD_NONCONST(ld) \ +#define SPARC64_LD_NONCONST(ld, type) \ __asm volatile( \ "wr %2,%%g0,%%asi; "\ #ld " [%1]%%asi,%0 "\ : "=r" (_v) \ - : "r" ((__uintptr_t)(loc)), "r" (asi)) + : "r" ((__uintptr_t)(loc)), "r" (asi), \ + "m" (*(type *)(__uintptr_t)(loc))) #if defined(__GNUC__) && defined(__OPTIMIZE__) #define SPARC64_LD_DEF(ld, type, vtype) \ @@ -501,9 +502,10 @@ static __inline type ld(paddr_t loc, int __asm volatile( \ #ld " [%1]%2,%0 " \ : "=r" (_v) \ - : "r" ((__uintptr_t)(loc)), "n" (asi)); \ + : "r" ((__uintptr_t)(loc)), "n" (asi), \ + "m" (*(type *)(__uintptr_t)(loc))); \ else\ - SPARC64_LD_NONCONST(ld);\ + SPARC64_LD_NONCONST(ld, type);\ return _v; \ } #else @@ -511,7 +513,7 @@ static __inline type ld(paddr_t loc, int static __inline type ld(paddr_t loc, int asi)\ { \ vtype _v; \ - SPARC64_LD_NONCONST(ld); \ + SPARC64_LD_NONCONST(ld, type); \ return _v; \ } #endif @@ -677,12 +679,12 @@ SPARC64_LD_DEF64(ldxa, uint64_t) #ifdef __arch64__ /* 64-bit kernel, non-constant */ -#define SPARC64_ST_NONCONST(st) \ +#define SPARC64_ST_NONCONST(st, type) \ __asm volatile( \ "wr %2,%%g0,%%asi; "\ #st " %0,[%1]%%asi "\ : : "r" (value), "r" ((__uintptr_t)(loc)), \ - "r" (asi)) + "r" (asi), "m" (*(type *)(__uintptr_t)(loc))) #if defined(__GNUC__) && defined(__OPTIMIZE__) #define SPARC64_ST_DEF(st, type) \ @@ -692,15 +694,15 @@ static __inline void st(paddr_t loc, int __asm volatile( \ #st " %0,[%1]%2 " \ : : "r" (value), "r" ((__uintptr_t)(loc)), \ - "n" (asi)); \ + "n" (asi), "m" (*(type *)(__uintptr_t)(loc))); \ else\ - SPARC64_ST_NONCONST(st);\ + SPARC64_ST_NONCONST(st, type);\ } #else #define SPARC64_ST_DEF(st, type) \ static __inline void st(paddr_t loc, int asi, type value) \ { \ - SPARC64_ST_NONCONST(st); \ + SPARC64_ST_NONCONST(st, type); \ } #endif #define SPARC64_ST_DEF64(st, type) SPARC64_ST_DEF(st, type)
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Fri Apr 5 12:15:41 UTC 2019 Modified Files: src/sys/arch/sparc64/include: psl.h Log Message: Put "memory" to asm inline reading privilege registers for clang to prevent it from being removed by excessive optimization. To generate a diff of this commit: cvs rdiff -u -r1.58 -r1.59 src/sys/arch/sparc64/include/psl.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/psl.h diff -u src/sys/arch/sparc64/include/psl.h:1.58 src/sys/arch/sparc64/include/psl.h:1.59 --- src/sys/arch/sparc64/include/psl.h:1.58 Fri Feb 8 20:09:24 2019 +++ src/sys/arch/sparc64/include/psl.h Fri Apr 5 12:15:41 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.58 2019/02/08 20:09:24 palle Exp $ */ +/* $NetBSD: psl.h,v 1.59 2019/04/05 12:15:41 nakayama Exp $ */ /* * Copyright (c) 1992, 1993 @@ -292,8 +292,9 @@ * Put "memory" to asm inline on sun4v to avoid issuing rdpr %ver * before checking cputyp as a result of code moving by compiler * optimization. + * For clang, to prevent it from being removed by optimization. */ -#ifdef SUN4V +#if defined(SUN4V) || defined(__clang__) #define constasm_clobbers "memory" #else #define constasm_clobbers
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: palle Date: Fri Feb 8 20:09:24 UTC 2019 Modified Files: src/sys/arch/sparc64/include: psl.h Log Message: Introduce getstickcmpr() function To generate a diff of this commit: cvs rdiff -u -r1.57 -r1.58 src/sys/arch/sparc64/include/psl.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/psl.h diff -u src/sys/arch/sparc64/include/psl.h:1.57 src/sys/arch/sparc64/include/psl.h:1.58 --- src/sys/arch/sparc64/include/psl.h:1.57 Wed May 18 07:59:30 2016 +++ src/sys/arch/sparc64/include/psl.h Fri Feb 8 20:09:24 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.57 2016/05/18 07:59:30 nakayama Exp $ */ +/* $NetBSD: psl.h,v 1.58 2019/02/08 20:09:24 palle Exp $ */ /* * Copyright (c) 1992, 1993 @@ -383,6 +383,9 @@ SPARC64_RDCONST64_DEF(rdpr, ver, %ver) SPARC64_RDASR64_DEF(stick, STICK) /* getstick() */ SPARC64_WRASR64_DEF(stick, STICK) /* setstick() */ +/* System Tick Compare Register (ASR 25) */ +SPARC64_RDASR64_DEF(stickcmpr, STICK_CMPR) /* getstickcmpr() */ + /* Some simple macros to check the cpu type. */ #define GETVER_CPU_MASK() ((getver() & VER_MASK) >> VER_MASK_SHIFT) #define GETVER_CPU_IMPL() ((getver() & VER_IMPL) >> VER_IMPL_SHIFT)
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: jdolecek Date: Tue Jan 8 19:53:40 UTC 2019 Modified Files: src/sys/arch/sparc64/include: bootinfo.h Log Message: remove explicit include, code including this already includes To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/sparc64/include/bootinfo.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/bootinfo.h diff -u src/sys/arch/sparc64/include/bootinfo.h:1.8 src/sys/arch/sparc64/include/bootinfo.h:1.9 --- src/sys/arch/sparc64/include/bootinfo.h:1.8 Fri Sep 15 13:25:34 2017 +++ src/sys/arch/sparc64/include/bootinfo.h Tue Jan 8 19:53:40 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: bootinfo.h,v 1.8 2017/09/15 13:25:34 martin Exp $*/ +/* $NetBSD: bootinfo.h,v 1.9 2019/01/08 19:53:40 jdolecek Exp $*/ /*- * Copyright (c) 2005 The NetBSD Foundation, Inc. @@ -29,7 +29,6 @@ #ifndef _BOOTINFO_H_ #define _BOOTINFO_H_ -#include #include /*
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: riastradh Date: Mon Aug 27 16:16:16 UTC 2018 Modified Files: src/sys/arch/sparc64/include: bus_funcs.h Log Message: Expand to __nothing, not to empty. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/sparc64/include/bus_funcs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/bus_funcs.h diff -u src/sys/arch/sparc64/include/bus_funcs.h:1.4 src/sys/arch/sparc64/include/bus_funcs.h:1.5 --- src/sys/arch/sparc64/include/bus_funcs.h:1.4 Mon Aug 27 16:16:02 2018 +++ src/sys/arch/sparc64/include/bus_funcs.h Mon Aug 27 16:16:16 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: bus_funcs.h,v 1.4 2018/08/27 16:16:02 riastradh Exp $ */ +/* $NetBSD: bus_funcs.h,v 1.5 2018/08/27 16:16:16 riastradh Exp $ */ /*- * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. @@ -404,7 +404,7 @@ struct uio; (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP -#define bus_dmatag_destroy(t) +#define bus_dmatag_destroy(t) __nothing #ifdef _SPARC_BUS_DMA_PRIVATE int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: riastradh Date: Mon Aug 27 16:16:02 UTC 2018 Modified Files: src/sys/arch/sparc64/include: bus_funcs.h Log Message: Include some needful header files and forward declarations. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/sparc64/include/bus_funcs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/bus_funcs.h diff -u src/sys/arch/sparc64/include/bus_funcs.h:1.3 src/sys/arch/sparc64/include/bus_funcs.h:1.4 --- src/sys/arch/sparc64/include/bus_funcs.h:1.3 Mon Jul 14 12:40:38 2014 +++ src/sys/arch/sparc64/include/bus_funcs.h Mon Aug 27 16:16:02 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: bus_funcs.h,v 1.3 2014/07/14 12:40:38 nakayama Exp $ */ +/* $NetBSD: bus_funcs.h,v 1.4 2018/08/27 16:16:02 riastradh Exp $ */ /*- * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. @@ -65,6 +65,17 @@ #ifndef _SPARC64_BUS_FUNCS_H_ #define _SPARC64_BUS_FUNCS_H_ +#include +#include +#include + +#include + +struct mbuf; +struct openprom_range; +struct proc; +struct uio; + /* * Debug hooks */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: martin Date: Tue Nov 14 16:56:03 UTC 2017 Modified Files: src/sys/arch/sparc64/include: vmparam.h Log Message: Bump PAGER_MAP_DEFAULT_SIZE to 512 MB (like amd64 recently did). To generate a diff of this commit: cvs rdiff -u -r1.37 -r1.38 src/sys/arch/sparc64/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/vmparam.h diff -u src/sys/arch/sparc64/include/vmparam.h:1.37 src/sys/arch/sparc64/include/vmparam.h:1.38 --- src/sys/arch/sparc64/include/vmparam.h:1.37 Sat Mar 26 11:49:10 2016 +++ src/sys/arch/sparc64/include/vmparam.h Tue Nov 14 16:56:03 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.37 2016/03/26 11:49:10 martin Exp $ */ +/* $NetBSD: vmparam.h,v 1.38 2017/11/14 16:56:03 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -58,6 +58,12 @@ #define PAGE_MASK (PAGE_SIZE - 1) /* + * Default pager_map of 16MB is awfully small. There is plenty + * of VA so use it. + */ +#definePAGER_MAP_DEFAULT_SIZE (512 * 1024 * 1024) + +/* * The kernel itself is mapped by the boot loader with 4Mb locked VM pages, * so let's keep 4Mb definitions here as well. */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: martin Date: Tue Jan 31 16:13:56 UTC 2017 Modified Files: src/sys/arch/sparc64/include: elf_machdep.h Log Message: PR port-sparc64/51925: remove EM_SPARC32PLUS from the 64 bit ELF machine ids we accept for our executables - that combination makes no sense at all (probably copy&pasto). To generate a diff of this commit: cvs rdiff -u -r1.11 -r1.12 src/sys/arch/sparc64/include/elf_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/elf_machdep.h diff -u src/sys/arch/sparc64/include/elf_machdep.h:1.11 src/sys/arch/sparc64/include/elf_machdep.h:1.12 --- src/sys/arch/sparc64/include/elf_machdep.h:1.11 Thu Nov 14 12:11:13 2013 +++ src/sys/arch/sparc64/include/elf_machdep.h Tue Jan 31 16:13:56 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: elf_machdep.h,v 1.11 2013/11/14 12:11:13 martin Exp $ */ +/* $NetBSD: elf_machdep.h,v 1.12 2017/01/31 16:13:56 martin Exp $ */ #define ELF32_MACHDEP_ENDIANNESS ELFDATA2MSB #define ELF32_MACHDEP_ID_CASES \ @@ -8,7 +8,6 @@ #define ELF64_MACHDEP_ENDIANNESS ELFDATA2MSB #define ELF64_MACHDEP_ID_CASES \ - case EM_SPARC32PLUS: \ case EM_SPARCV9: \ break;
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: skrll Date: Wed Sep 28 11:44:16 UTC 2016 Modified Files: src/sys/arch/sparc64/include: ptrace.h Log Message: Whitespace To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/sparc64/include/ptrace.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/ptrace.h diff -u src/sys/arch/sparc64/include/ptrace.h:1.3 src/sys/arch/sparc64/include/ptrace.h:1.4 --- src/sys/arch/sparc64/include/ptrace.h:1.3 Tue Mar 14 22:05:05 2006 +++ src/sys/arch/sparc64/include/ptrace.h Wed Sep 28 11:44:16 2016 @@ -1,4 +1,4 @@ -/* $NetBSD: ptrace.h,v 1.3 2006/03/14 22:05:05 cube Exp $*/ +/* $NetBSD: ptrace.h,v 1.4 2016/09/28 11:44:16 skrll Exp $*/ #include @@ -8,7 +8,7 @@ #ifdef COMPAT_NETBSD32 #include -#define process_read_regs32 netbsd32_process_read_regs +#define process_read_regs32 netbsd32_process_read_regs #define process_read_fpregs32 netbsd32_process_read_fpregs #define process_reg32 struct reg32
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: palle Date: Sat Jun 25 13:52:04 UTC 2016 Modified Files: src/sys/arch/sparc64/include: cpu.h Log Message: sun4v: fix previous fix - no need to protect "struct inthand" with "#if defined(_KERNEL)" + use proper include file name - sparc64/bus_defs.h -> machine/bus_defs.h To generate a diff of this commit: cvs rdiff -u -r1.121 -r1.122 src/sys/arch/sparc64/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/cpu.h diff -u src/sys/arch/sparc64/include/cpu.h:1.121 src/sys/arch/sparc64/include/cpu.h:1.122 --- src/sys/arch/sparc64/include/cpu.h:1.121 Thu Jun 23 20:32:40 2016 +++ src/sys/arch/sparc64/include/cpu.h Sat Jun 25 13:52:04 2016 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.121 2016/06/23 20:32:40 palle Exp $ */ +/* $NetBSD: cpu.h,v 1.122 2016/06/25 13:52:04 palle Exp $ */ /* * Copyright (c) 1992, 1993 @@ -68,9 +68,9 @@ #include #include #if defined(_KERNEL) +#include #include #include -#include #endif #ifdef SUN4V #include @@ -349,7 +349,6 @@ void cpu_signotify(struct lwp *); * handler into the list. The handler is called with its (single) * argument, or with a pointer to a clockframe if ih_arg is NULL. */ -#if defined(_KERNEL) struct intrhand { int (*ih_fun)(void *); void *ih_arg; @@ -370,7 +369,6 @@ struct intrhand { uint32_t ih_ivec; char ih_name[32]; /* name for the above */ }; -#endif extern struct intrhand *intrhand[]; extern struct intrhand *intrlev[MAXINTNUM];
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: palle Date: Thu Jun 23 20:32:40 UTC 2016 Modified Files: src/sys/arch/sparc64/include: cpu.h Log Message: sun4v: Fix build issue introduced in previous commit - bus stuff is kernel only, so protect this with _KERNEL To generate a diff of this commit: cvs rdiff -u -r1.120 -r1.121 src/sys/arch/sparc64/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/cpu.h diff -u src/sys/arch/sparc64/include/cpu.h:1.120 src/sys/arch/sparc64/include/cpu.h:1.121 --- src/sys/arch/sparc64/include/cpu.h:1.120 Wed Jun 22 20:13:00 2016 +++ src/sys/arch/sparc64/include/cpu.h Thu Jun 23 20:32:40 2016 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.120 2016/06/22 20:13:00 palle Exp $ */ +/* $NetBSD: cpu.h,v 1.121 2016/06/23 20:32:40 palle Exp $ */ /* * Copyright (c) 1992, 1993 @@ -63,7 +63,6 @@ #include "opt_lockdebug.h" #endif -#include #include #include #include @@ -71,6 +70,7 @@ #if defined(_KERNEL) #include #include +#include #endif #ifdef SUN4V #include @@ -342,12 +342,14 @@ struct clockframe { */ void cpu_signotify(struct lwp *); + /* * Interrupt handler chains. Interrupt handlers should return 0 for * ``not me'' or 1 (``I took care of it''). intr_establish() inserts a * handler into the list. The handler is called with its (single) * argument, or with a pointer to a clockframe if ih_arg is NULL. */ +#if defined(_KERNEL) struct intrhand { int (*ih_fun)(void *); void *ih_arg; @@ -368,6 +370,7 @@ struct intrhand { uint32_t ih_ivec; char ih_name[32]; /* name for the above */ }; +#endif extern struct intrhand *intrhand[]; extern struct intrhand *intrlev[MAXINTNUM];
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: christos Date: Thu May 19 15:36:35 UTC 2016 Modified Files: src/sys/arch/sparc64/include: proc.h Log Message: lose one more bit of ALSR to account for rounding in the VA hole. To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/sparc64/include/proc.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/proc.h diff -u src/sys/arch/sparc64/include/proc.h:1.14 src/sys/arch/sparc64/include/proc.h:1.15 --- src/sys/arch/sparc64/include/proc.h:1.14 Mon May 16 20:39:43 2016 +++ src/sys/arch/sparc64/include/proc.h Thu May 19 11:36:35 2016 @@ -1,4 +1,4 @@ -/* $NetBSD: proc.h,v 1.14 2016/05/17 00:39:43 christos Exp $ */ +/* $NetBSD: proc.h,v 1.15 2016/05/19 15:36:35 christos Exp $ */ /* * Copyright (c) 1992, 1993 @@ -60,6 +60,6 @@ struct mdproc { #define netbsd32_syscall_intern syscall_intern -#define PAX_ASLR_RAND_MMAP_MAX 0x8 +#define PAX_ASLR_RAND_MMAP_MAX 0x4 #endif /* _SPARC64_PROC_H */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Wed May 18 07:59:30 UTC 2016 Modified Files: src/sys/arch/sparc64/include: psl.h Log Message: Fix (unused) pstate mask bits in tstate and comment. To generate a diff of this commit: cvs rdiff -u -r1.56 -r1.57 src/sys/arch/sparc64/include/psl.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/psl.h diff -u src/sys/arch/sparc64/include/psl.h:1.56 src/sys/arch/sparc64/include/psl.h:1.57 --- src/sys/arch/sparc64/include/psl.h:1.56 Thu Dec 25 14:02:03 2014 +++ src/sys/arch/sparc64/include/psl.h Wed May 18 07:59:30 2016 @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.56 2014/12/25 14:02:03 nakayama Exp $ */ +/* $NetBSD: psl.h,v 1.57 2016/05/18 07:59:30 nakayama Exp $ */ /* * Copyright (c) 1992, 1993 @@ -165,14 +165,14 @@ /* * SPARC V9 TSTATE register * - * 39 32 31 24 23 18 17 8 7 5 4 0 + * 39 32 31 24 23 20 19 8 7 5 4 0 * +-+-+-++---+-+ * | CCR | ASI | - | PSTATE | - | CWP | * +-+-+-++---+-+ */ #define TSTATE_CWP 0x01f -#define TSTATE_PSTATE 0x6ff00 +#define TSTATE_PSTATE 0xfff00 #define TSTATE_PSTATE_SHIFT 8 #define TSTATE_ASI 0xff00LL #define TSTATE_ASI_SHIFT 24
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: christos Date: Tue May 17 00:39:43 UTC 2016 Modified Files: src/sys/arch/sparc64/include: proc.h Log Message: Clamt the PAX_ASLR random value to the max bits we have for VA. To generate a diff of this commit: cvs rdiff -u -r1.13 -r1.14 src/sys/arch/sparc64/include/proc.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/proc.h diff -u src/sys/arch/sparc64/include/proc.h:1.13 src/sys/arch/sparc64/include/proc.h:1.14 --- src/sys/arch/sparc64/include/proc.h:1.13 Thu Jan 13 21:06:32 2011 +++ src/sys/arch/sparc64/include/proc.h Mon May 16 20:39:43 2016 @@ -1,4 +1,4 @@ -/* $NetBSD: proc.h,v 1.13 2011/01/14 02:06:32 rmind Exp $ */ +/* $NetBSD: proc.h,v 1.14 2016/05/17 00:39:43 christos Exp $ */ /* * Copyright (c) 1992, 1993 @@ -60,4 +60,6 @@ struct mdproc { #define netbsd32_syscall_intern syscall_intern +#define PAX_ASLR_RAND_MMAP_MAX 0x8 + #endif /* _SPARC64_PROC_H */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: martin Date: Fri Apr 15 20:29:13 UTC 2016 Modified Files: src/sys/arch/sparc64/include: param.h Log Message: If compiling with SUN4V support, bump MAXCPUS to 256. To generate a diff of this commit: cvs rdiff -u -r1.56 -r1.57 src/sys/arch/sparc64/include/param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/param.h diff -u src/sys/arch/sparc64/include/param.h:1.56 src/sys/arch/sparc64/include/param.h:1.57 --- src/sys/arch/sparc64/include/param.h:1.56 Tue Oct 27 22:28:56 2015 +++ src/sys/arch/sparc64/include/param.h Fri Apr 15 20:29:13 2016 @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.56 2015/10/27 22:28:56 mrg Exp $ */ +/* $NetBSD: param.h,v 1.57 2016/04/15 20:29:13 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -108,6 +108,11 @@ extern int nbpg, pgofset, pgshift; #define MAXPHYS (64 * 1024) #ifdef __arch64__ + +#ifdef SUN4V +#define MAXCPUS 256 +#endif + /* We get stack overflows w/8K stacks in 64-bit mode */ #define SSIZE 2 /* initial stack size in pages */ #else
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: martin Date: Sat Mar 26 11:49:10 UTC 2016 Modified Files: src/sys/arch/sparc64/include: vmparam.h Log Message: Fix comment To generate a diff of this commit: cvs rdiff -u -r1.36 -r1.37 src/sys/arch/sparc64/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/vmparam.h diff -u src/sys/arch/sparc64/include/vmparam.h:1.36 src/sys/arch/sparc64/include/vmparam.h:1.37 --- src/sys/arch/sparc64/include/vmparam.h:1.36 Sun Nov 22 11:42:55 2015 +++ src/sys/arch/sparc64/include/vmparam.h Sat Mar 26 11:49:10 2016 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.36 2015/11/22 11:42:55 martin Exp $ */ +/* $NetBSD: vmparam.h,v 1.37 2016/03/26 11:49:10 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -41,7 +41,7 @@ */ /* - * Machine dependent constants for Sun-4c SPARC + * Machine dependent constants for Sun 4U and 4V UltraSPARC */ #ifndef VMPARAM_H
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: martin Date: Sun Nov 22 11:42:55 UTC 2015 Modified Files: src/sys/arch/sparc64/include: vmparam.h Log Message: Reduce the "MAXDSIZ" limit for bottom-up-VA (i.e. old binaries) processes to the old limit of 1 GB. Some old binaries can not deal with more. To generate a diff of this commit: cvs rdiff -u -r1.35 -r1.36 src/sys/arch/sparc64/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/vmparam.h diff -u src/sys/arch/sparc64/include/vmparam.h:1.35 src/sys/arch/sparc64/include/vmparam.h:1.36 --- src/sys/arch/sparc64/include/vmparam.h:1.35 Sun Nov 15 20:35:33 2015 +++ src/sys/arch/sparc64/include/vmparam.h Sun Nov 22 11:42:55 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.35 2015/11/15 20:35:33 martin Exp $ */ +/* $NetBSD: vmparam.h,v 1.36 2015/11/22 11:42:55 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -102,7 +102,7 @@ * model. */ #define VM_DEFAULT_ADDRESS_BOTTOMUP(da, sz) \ -round_page((vaddr_t)(da) + (vsize_t)max(maxdmap,2UL*1024*1024*1024)) +round_page((vaddr_t)(da) + (vsize_t)max(maxdmap,1UL*1024*1024*1024)) #endif #ifndef DFLSSIZ #define DFLSSIZ (2*1024*1024) /* initial stack size limit */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: martin Date: Sun Nov 15 20:35:34 UTC 2015 Modified Files: src/sys/arch/sparc64/include: vmparam.h Log Message: PR 32999: adjust VM parameters for 64 bit kernel/userlands. Limit old binaries (i.e. processes not using topdown VA layout) to 2 GB data size. Use the same limits as native sparc for netbsd32 emulation - we need to revisit this, but currently automatic test runs in this environment fail big time, so there is no easy way to verify any changes. To generate a diff of this commit: cvs rdiff -u -r1.34 -r1.35 src/sys/arch/sparc64/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/vmparam.h diff -u src/sys/arch/sparc64/include/vmparam.h:1.34 src/sys/arch/sparc64/include/vmparam.h:1.35 --- src/sys/arch/sparc64/include/vmparam.h:1.34 Mon Apr 14 10:54:08 2014 +++ src/sys/arch/sparc64/include/vmparam.h Sun Nov 15 20:35:33 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.34 2014/04/14 10:54:08 martin Exp $ */ +/* $NetBSD: vmparam.h,v 1.35 2015/11/15 20:35:33 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -78,8 +78,7 @@ /* * Virtual memory related constants, all in bytes */ -/* #ifdef __arch64__ */ -#if 0 +#if __arch64__ /* * 64-bit limits: * @@ -90,64 +89,69 @@ * of that for data and the other half for stack. */ #ifndef MAXTSIZ -#define MAXTSIZ (4L*1024*1024*1024) /* max text size */ +#define MAXTSIZ (4UL*1024*1024*1024) /* max text size */ #endif #ifndef DFLDSIZ -#define DFLDSIZ (128L*1024*1024) /* initial data size limit */ +#define DFLDSIZ (128UL*1024*1024) /* initial data size limit */ #endif #ifndef MAXDSIZ -#define MAXDSIZ (1L<<39) /* max data size */ +#define MAXDSIZ (1UL<<39) /* max data size */ +/* + * For processes not using topdown VA, we need to limit the data size - + * they probably have not been compiled with the proper compiler memory + * model. + */ +#define VM_DEFAULT_ADDRESS_BOTTOMUP(da, sz) \ +round_page((vaddr_t)(da) + (vsize_t)max(maxdmap,2UL*1024*1024*1024)) #endif #ifndef DFLSSIZ #define DFLSSIZ (2*1024*1024) /* initial stack size limit */ #endif #ifndef MAXSSIZ -#define MAXSSIZ MAXDSIZ /* max stack size */ +#define MAXSSIZ (128*1024*1024) /* max stack size */ #endif #else /* * 32-bit limits: * - * We only have 4GB to play with. Limit stack, data, and text - * each to half of that. + * We only have 4GB to play with. Limit data, and text + * each to half of that and set a reasonable stack limit. * - * This is silly. Apparently if we go above these numbers - * integer overflows in other parts of the kernel cause hangs. */ #ifndef MAXTSIZ -#define MAXTSIZ (1*1024*1024*1024) /* max text size */ +#define MAXTSIZ (2UL*1024*1024*1024) /* max text size */ #endif #ifndef DFLDSIZ #define DFLDSIZ (128*1024*1024) /* initial data size limit */ #endif #ifndef MAXDSIZ -#define MAXDSIZ (1*1024*1024*1024) /* max data size */ +#define MAXDSIZ (2UL*1024*1024*1024) /* max data size */ #endif #ifndef DFLSSIZ #define DFLSSIZ (2*1024*1024) /* initial stack size limit */ #endif #ifndef MAXSSIZ -#define MAXSSIZ (8*1024*1024) /* max stack size */ +#define MAXSSIZ (64*1024*1024) /* max stack size */ #endif #endif /* - * 32-bit emulation limits. + * 32-bit emulation limits (same as sparc - we could go bigger) */ #ifndef MAXTSIZ32 -#define MAXTSIZ32 (1*1024*1024*1024) /* max text size */ +#define MAXTSIZ32 (64*1024*1024) /* max text size */ #endif #ifndef DFLDSIZ32 -#define DFLDSIZ32 (128*1024*1024) /* initial data size limit */ +#define DFLDSIZ32 (64*1024*1024) /* initial data size limit */ #endif #ifndef MAXDSIZ32 -#define MAXDSIZ32 (1*1024*1024*1024) /* max data size */ +#define MAXDSIZ32 (512*1024*1024) /* max data size */ #endif #ifndef DFLSSIZ32 #define DFLSSIZ32 (2*1024*1024) /* initial stack size limit */ #endif #ifndef MAXSSIZ32 -#define MAXSSIZ32 (8*1024*1024) /* max stack size */ +#define MAXSSIZ32 (32*1024*1024) /* max stack size */ #endif /*
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: palle Date: Mon Sep 7 20:00:49 UTC 2015 Modified Files: src/sys/arch/sparc64/include: cpu.h Log Message: Move function prototypes for cpu_ecache_associativity() and cpu_ecache_size() outside the MULTIPROCESSOR block so a GENERIC.UP kernel will build again To generate a diff of this commit: cvs rdiff -u -r1.117 -r1.118 src/sys/arch/sparc64/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/cpu.h diff -u src/sys/arch/sparc64/include/cpu.h:1.117 src/sys/arch/sparc64/include/cpu.h:1.118 --- src/sys/arch/sparc64/include/cpu.h:1.117 Sun Sep 6 23:48:39 2015 +++ src/sys/arch/sparc64/include/cpu.h Mon Sep 7 20:00:49 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.117 2015/09/06 23:48:39 nakayama Exp $ */ +/* $NetBSD: cpu.h,v 1.118 2015/09/07 20:00:49 palle Exp $ */ /* * Copyright (c) 1992, 1993 @@ -263,6 +263,10 @@ void cpu_pmap_init(struct cpu_info *); /* run upfront to prepare the cpu_info */ void cpu_pmap_prepare(struct cpu_info *, bool); +/* Helper functions to retrieve cache info */ +int cpu_ecache_associativity(int node); +int cpu_ecache_size(int node); + #if defined(MULTIPROCESSOR) extern vaddr_t cpu_spinup_trampoline; @@ -275,10 +279,6 @@ extern u_long mp_tramp_ci; void cpu_hatch(void); void cpu_boot_secondary_processors(void); -/* Helper functions to retrieve cache info */ -int cpu_ecache_associativity(int node); -int cpu_ecache_size(int node); - /* * Call a function on other cpus: * multicast - send to everyone in the sparc64_cpuset_t
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: joerg Date: Sun Aug 23 10:53:28 UTC 2015 Modified Files: src/sys/arch/sparc64/include: locore.h Log Message: .align ensures alignment, so replace .uaword with .word. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/sparc64/include/locore.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/locore.h diff -u src/sys/arch/sparc64/include/locore.h:1.6 src/sys/arch/sparc64/include/locore.h:1.7 --- src/sys/arch/sparc64/include/locore.h:1.6 Sat Mar 16 23:04:22 2013 +++ src/sys/arch/sparc64/include/locore.h Sun Aug 23 10:53:28 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: locore.h,v 1.6 2013/03/16 23:04:22 christos Exp $ */ +/* $NetBSD: locore.h,v 1.7 2015/08/23 10:53:28 joerg Exp $ */ /* * Copyright (c) 1996-2002 Eduardo Horvath @@ -171,7 +171,7 @@ _C_LABEL(x): ; \ .data; \ .align 8; \ -0: .uaword 0; .uaword 0; \ +0: .word 0; .word 0; \ .text; \ save %sp, -CC64FSZ, %sp; \ sethi %hi(0b), %o0; \
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: palle Date: Fri Apr 3 10:07:57 UTC 2015 Modified Files: src/sys/arch/sparc64/include: pte.h Log Message: sun4v: There is no L-bit (Locked) in the sun4v tte To generate a diff of this commit: cvs rdiff -u -r1.26 -r1.27 src/sys/arch/sparc64/include/pte.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/pte.h diff -u src/sys/arch/sparc64/include/pte.h:1.26 src/sys/arch/sparc64/include/pte.h:1.27 --- src/sys/arch/sparc64/include/pte.h:1.26 Mon Mar 3 05:05:09 2014 +++ src/sys/arch/sparc64/include/pte.h Fri Apr 3 10:07:57 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: pte.h,v 1.26 2014/03/03 05:05:09 palle Exp $ */ +/* $NetBSD: pte.h,v 1.27 2015/04/03 10:07:57 palle Exp $ */ /* * Copyright (c) 1996-1999 Eduardo Horvath @@ -242,7 +242,6 @@ typedef struct sun4u_tte pte_t; #define SUN4V_TLB_MODIFY 0x0020LL #define SUN4V_TLB_REAL_W 0x2000LL #define SUN4V_TLB_TSB_LOCK 0x1000LL -#define SUN4V_TLB_L SUN4V_TLB_TSB_LOCK #define SUN4V_TLB_EXEC SUN4V_TLB_X #define SUN4V_TLB_EXEC_ONLY 0x0200LL /* H/W bits */ @@ -282,7 +281,7 @@ typedef struct sun4u_tte pte_t; #define TLB_REAL_W(CPU_ISSUN4V ? SUN4V_TLB_REAL_W: SUN4U_TLB_REAL_W) #define TLB_TSB_LOCK (CPU_ISSUN4V ? SUN4V_TLB_TSB_LOCK : SUN4U_TLB_TSB_LOCK) #define TLB_EXEC_ONLY (CPU_ISSUN4V ? SUN4V_TLB_EXEC_ONLY : SUN4U_TLB_EXEC_ONLY) -#define TLB_L (CPU_ISSUN4V ? SUN4V_TLB_L : SUN4U_TLB_L) +#define TLB_L (CPU_ISSUN4V ? 0 : SUN4U_TLB_L) #define TLB_CV(CPU_ISSUN4V ? SUN4V_TLB_CV: SUN4U_TLB_CV) #define MMU_CACHE_VIRT 0x3
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Thu Dec 25 14:02:03 UTC 2014 Modified Files: src/sys/arch/sparc64/include: psl.h Log Message: Put "memory" to asm inline for reading privilege registers on sun4v to avoid issuing rdpr %ver before checking cputyp as a result of code moving by compiler optimization. To generate a diff of this commit: cvs rdiff -u -r1.55 -r1.56 src/sys/arch/sparc64/include/psl.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/psl.h diff -u src/sys/arch/sparc64/include/psl.h:1.55 src/sys/arch/sparc64/include/psl.h:1.56 --- src/sys/arch/sparc64/include/psl.h:1.55 Fri Dec 5 11:34:00 2014 +++ src/sys/arch/sparc64/include/psl.h Thu Dec 25 14:02:03 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.55 2014/12/05 11:34:00 nakayama Exp $ */ +/* $NetBSD: psl.h,v 1.56 2014/12/25 14:02:03 nakayama Exp $ */ /* * Copyright (c) 1992, 1993 @@ -284,6 +284,21 @@ #if defined(_KERNEL) && !defined(_LOCORE) +#if defined(_KERNEL_OPT) +#include "opt_sparc_arch.h" +#endif + +/* + * Put "memory" to asm inline on sun4v to avoid issuing rdpr %ver + * before checking cputyp as a result of code moving by compiler + * optimization. + */ +#ifdef SUN4V +#define constasm_clobbers "memory" +#else +#define constasm_clobbers +#endif + /* * Inlines for manipulating privileged and ancillary state registers */ @@ -291,7 +306,7 @@ static __inline __constfunc type get##name(void) \ { \ type _val; \ - __asm(#rd " %" #reg ",%0" : "=r" (_val)); \ + __asm(#rd " %" #reg ",%0" : "=r" (_val) : : constasm_clobbers); \ return _val; \ } #define SPARC64_RD_DEF(rd, name, reg, type)\ @@ -318,7 +333,7 @@ static __inline __constfunc uint64_t get { \ uint32_t _hi, _lo; \ __asm(#rd " %" #reg ",%0; srl %0,0,%1; srlx %0,32,%0" \ - : "=r" (_hi), "=r" (_lo));\ + : "=r" (_hi), "=r" (_lo) : : constasm_clobbers); \ return ((uint64_t)_hi << 32) | _lo;\ } #define SPARC64_RD64_DEF(rd, name, reg) \
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Fri Dec 5 11:31:50 UTC 2014 Modified Files: src/sys/arch/sparc64/include: psl.h Log Message: Make getver() into a constant function since Version Register (%ver) is read only and its value is constant. This change reduces multipule %ver reads to one in the functions which uses a number of CPU_IS_* macros. To generate a diff of this commit: cvs rdiff -u -r1.53 -r1.54 src/sys/arch/sparc64/include/psl.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/psl.h diff -u src/sys/arch/sparc64/include/psl.h:1.53 src/sys/arch/sparc64/include/psl.h:1.54 --- src/sys/arch/sparc64/include/psl.h:1.53 Sun Aug 18 09:31:38 2013 +++ src/sys/arch/sparc64/include/psl.h Fri Dec 5 11:31:50 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.53 2013/08/18 09:31:38 martin Exp $ */ +/* $NetBSD: psl.h,v 1.54 2014/12/05 11:31:50 nakayama Exp $ */ /* * Copyright (c) 1992, 1993 @@ -287,6 +287,13 @@ /* * Inlines for manipulating privileged and ancillary state registers */ +#define SPARC64_RDCONST_DEF(rd, name, reg, type) \ +static __inline __constfunc type get##name(void) \ +{ \ + type _val; \ + __asm(#rd " %" #reg ",%0" : "=r" (_val)); \ + return _val; \ +} #define SPARC64_RD_DEF(rd, name, reg, type)\ static __inline type get##name(void) \ { \ @@ -301,9 +308,19 @@ static __inline void set##name(type _val } #ifdef __arch64__ +#define SPARC64_RDCONST64_DEF(rd, name, reg) \ + SPARC64_RDCONST_DEF(rd, name, reg, uint64_t) #define SPARC64_RD64_DEF(rd, name, reg) SPARC64_RD_DEF(rd, name, reg, uint64_t) #define SPARC64_WR64_DEF(wr, name, reg) SPARC64_WR_DEF(wr, name, reg, uint64_t) #else +#define SPARC64_RDCONST64_DEF(rd, name, reg)\ +static __inline __constfunc uint64_t get##name(void) \ +{ \ + uint32_t _hi, _lo; \ + __asm(#rd " %" #reg ",%0; srl %0,0,%1; srlx %0,32,%0" \ + : "=r" (_hi), "=r" (_lo));\ + return ((uint64_t)_hi << 32) | _lo;\ +} #define SPARC64_RD64_DEF(rd, name, reg) \ static __inline uint64_t get##name(void)\ { \ @@ -345,7 +362,7 @@ SPARC64_RDPR_DEF(cwp, %cwp, int) /* get SPARC64_WRPR_DEF(cwp, %cwp, int) /* setcwp() */ /* Version Register (PR 31) */ -SPARC64_RDPR64_DEF(ver, %ver) /* getver() */ +SPARC64_RDCONST64_DEF(rdpr, ver, %ver) /* getver() */ /* System Tick Register (ASR 24) */ SPARC64_RDASR64_DEF(stick, STICK) /* getstick() */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: macallan Date: Wed Oct 8 10:30:27 UTC 2014 Modified Files: src/sys/arch/sparc64/include: param.h Log Message: Ths has been sitting in my tree for years... Allow the Xserver to map PCI IO space. Not needed for Sun-branded graphics cards but Xorg can actually cold boot a few others, which will need it. ( if only to access standard VGA registers ) To generate a diff of this commit: cvs rdiff -u -r1.54 -r1.55 src/sys/arch/sparc64/include/param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/param.h diff -u src/sys/arch/sparc64/include/param.h:1.54 src/sys/arch/sparc64/include/param.h:1.55 --- src/sys/arch/sparc64/include/param.h:1.54 Thu Jul 10 06:24:02 2014 +++ src/sys/arch/sparc64/include/param.h Wed Oct 8 10:30:27 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.54 2014/07/10 06:24:02 jdc Exp $ */ +/* $NetBSD: param.h,v 1.55 2014/10/08 10:30:27 macallan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -281,3 +281,5 @@ extern const int cputyp; #define PGSHIFT 13 /* log2(NBPG) */ #define NBPG (1<
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: palle Date: Thu Jun 5 18:36:44 UTC 2014 Modified Files: src/sys/arch/sparc64/include: hypervisor.h Log Message: sun4v: ensure that it is possible to include the hypervisor.h file more than once To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/sparc64/include/hypervisor.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/hypervisor.h diff -u src/sys/arch/sparc64/include/hypervisor.h:1.2 src/sys/arch/sparc64/include/hypervisor.h:1.3 --- src/sys/arch/sparc64/include/hypervisor.h:1.2 Sat Dec 7 16:54:43 2013 +++ src/sys/arch/sparc64/include/hypervisor.h Thu Jun 5 18:36:44 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: hypervisor.h,v 1.2 2013/12/07 16:54:43 palle Exp $ */ +/* $NetBSD: hypervisor.h,v 1.3 2014/06/05 18:36:44 palle Exp $ */ /* $OpenBSD: hypervisor.h,v 1.14 2011/06/26 17:23:46 kettenis Exp $ */ /* @@ -17,6 +17,9 @@ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ +#ifndef _HYPERVISOR_H_ +#define _HYPERVISOR_H_ + /* * UltraSPARC Hypervisor API. */ @@ -319,3 +322,5 @@ int64_t hv_rng_data_read(paddr_t raddr, #define H_ENOMAP 14 #define H_ETOOMANY 15 #define H_ECHANNEL 16 + +#endif /* _HYPERVISOR_H_ */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: martin Date: Mon Apr 14 10:54:08 UTC 2014 Modified Files: src/sys/arch/sparc64/include: pmap.h vmparam.h Log Message: Implement and enable TOPDOWN_VM. From Chuck Silvers. To generate a diff of this commit: cvs rdiff -u -r1.57 -r1.58 src/sys/arch/sparc64/include/pmap.h cvs rdiff -u -r1.33 -r1.34 src/sys/arch/sparc64/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/pmap.h diff -u src/sys/arch/sparc64/include/pmap.h:1.57 src/sys/arch/sparc64/include/pmap.h:1.58 --- src/sys/arch/sparc64/include/pmap.h:1.57 Fri Dec 27 21:11:19 2013 +++ src/sys/arch/sparc64/include/pmap.h Mon Apr 14 10:54:08 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.57 2013/12/27 21:11:19 palle Exp $ */ +/* $NetBSD: pmap.h,v 1.58 2014/04/14 10:54:08 martin Exp $ */ /*- * Copyright (C) 1995, 1996 Wolfgang Solfrank. @@ -192,8 +192,27 @@ int pmap_count_wired(struct pmap *); void pmap_activate_pmap(struct pmap *); void pmap_update(struct pmap *); void pmap_bootstrap(u_long, u_long); + /* make sure all page mappings are modulo 16K to prevent d$ aliasing */ -#define PMAP_PREFER(pa, va, sz, td) (*(va)+=(((*(va))^(pa))&(1<<(PGSHIFT +#define PMAP_PREFER(fo, va, sz, td) pmap_prefer((fo), (va), (td)) +static inline void +pmap_prefer(vaddr_t fo, vaddr_t *va, int td) +{ + vaddr_t newva; + vaddr_t m; + + m = 2 * PAGE_SIZE; + newva = (*va & ~(m - 1)) | (fo & (m - 1)); + + if (td) { + if (newva > *va) + newva -= m; + } else { + if (newva < *va) + newva += m; + } + *va = newva; +} #define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */ #define PMAP_NEED_PROCWR Index: src/sys/arch/sparc64/include/vmparam.h diff -u src/sys/arch/sparc64/include/vmparam.h:1.33 src/sys/arch/sparc64/include/vmparam.h:1.34 --- src/sys/arch/sparc64/include/vmparam.h:1.33 Thu Jan 3 09:40:55 2013 +++ src/sys/arch/sparc64/include/vmparam.h Mon Apr 14 10:54:08 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.33 2013/01/03 09:40:55 martin Exp $ */ +/* $NetBSD: vmparam.h,v 1.34 2014/04/14 10:54:08 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -47,6 +47,8 @@ #ifndef VMPARAM_H #define VMPARAM_H +#define __USE_TOPDOWN_VM + /* * We use 8K VM pages on the Sun4U. Override the PAGE_* definitions * to be compile-time constants.
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: palle Date: Mon Mar 3 05:05:09 UTC 2014 Modified Files: src/sys/arch/sparc64/include: pte.h Log Message: sun4v: SUN4V_TLB_TSB_LOCK define should have the same LL (instead of UL) as the other defines To generate a diff of this commit: cvs rdiff -u -r1.25 -r1.26 src/sys/arch/sparc64/include/pte.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/pte.h diff -u src/sys/arch/sparc64/include/pte.h:1.25 src/sys/arch/sparc64/include/pte.h:1.26 --- src/sys/arch/sparc64/include/pte.h:1.25 Fri Feb 21 18:00:09 2014 +++ src/sys/arch/sparc64/include/pte.h Mon Mar 3 05:05:09 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: pte.h,v 1.25 2014/02/21 18:00:09 palle Exp $ */ +/* $NetBSD: pte.h,v 1.26 2014/03/03 05:05:09 palle Exp $ */ /* * Copyright (c) 1996-1999 Eduardo Horvath @@ -241,7 +241,7 @@ typedef struct sun4u_tte pte_t; #define SUN4V_TLB_ACCESS 0x0010LL #define SUN4V_TLB_MODIFY 0x0020LL #define SUN4V_TLB_REAL_W 0x2000LL -#define SUN4V_TLB_TSB_LOCK 0x1000UL +#define SUN4V_TLB_TSB_LOCK 0x1000LL #define SUN4V_TLB_L SUN4V_TLB_TSB_LOCK #define SUN4V_TLB_EXEC SUN4V_TLB_X #define SUN4V_TLB_EXEC_ONLY 0x0200LL
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: palle Date: Thu Jan 9 20:28:24 UTC 2014 Modified Files: src/sys/arch/sparc64/include: cpu.h Log Message: sun4v: Update description of the ci_mmfsa field in the cpu_info structure To generate a diff of this commit: cvs rdiff -u -r1.108 -r1.109 src/sys/arch/sparc64/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/cpu.h diff -u src/sys/arch/sparc64/include/cpu.h:1.108 src/sys/arch/sparc64/include/cpu.h:1.109 --- src/sys/arch/sparc64/include/cpu.h:1.108 Thu Jan 9 12:51:27 2014 +++ src/sys/arch/sparc64/include/cpu.h Thu Jan 9 20:28:23 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.108 2014/01/09 12:51:27 macallan Exp $ */ +/* $NetBSD: cpu.h,v 1.109 2014/01/09 20:28:23 palle Exp $ */ /* * Copyright (c) 1992, 1993 @@ -174,11 +174,12 @@ struct cpu_info { pte_t *ci_tsb_dmmu; pte_t *ci_tsb_immu; - /* this field is used by SUN4V */ - /* MMU Fault Status Area. Will be initialized to the physical - address of the bottom of the interrupt stack */ + /* MMU Fault Status Area (sun4v). + * Will be initialized to the physical address of the bottom of + * the interrupt stack. + */ paddr_t ci_mmfsa; - + /* probe fault in PCI config space reads */ bool ci_pci_probe; bool ci_pci_fault;
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: macallan Date: Thu Jan 9 12:51:27 UTC 2014 Modified Files: src/sys/arch/sparc64/include: cpu.h Log Message: allow non-SUN4V kernels to build To generate a diff of this commit: cvs rdiff -u -r1.107 -r1.108 src/sys/arch/sparc64/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/cpu.h diff -u src/sys/arch/sparc64/include/cpu.h:1.107 src/sys/arch/sparc64/include/cpu.h:1.108 --- src/sys/arch/sparc64/include/cpu.h:1.107 Tue Jan 7 20:11:35 2014 +++ src/sys/arch/sparc64/include/cpu.h Thu Jan 9 12:51:27 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.107 2014/01/07 20:11:35 palle Exp $ */ +/* $NetBSD: cpu.h,v 1.108 2014/01/09 12:51:27 macallan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -174,11 +174,10 @@ struct cpu_info { pte_t *ci_tsb_dmmu; pte_t *ci_tsb_immu; -#ifdef SUN4V + /* this field is used by SUN4V */ /* MMU Fault Status Area. Will be initialized to the physical address of the bottom of the interrupt stack */ paddr_t ci_mmfsa; -#endif /* probe fault in PCI config space reads */ bool ci_pci_probe;
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: jdc Date: Sat Oct 26 18:47:27 UTC 2013 Modified Files: src/sys/arch/sparc64/include: autoconf.h Log Message: Allow machine_banner and machine_model to be used outside autoconf.c, for example, by drivers that need to match on model name. Suggested by mrg@. To generate a diff of this commit: cvs rdiff -u -r1.31 -r1.32 src/sys/arch/sparc64/include/autoconf.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/autoconf.h diff -u src/sys/arch/sparc64/include/autoconf.h:1.31 src/sys/arch/sparc64/include/autoconf.h:1.32 --- src/sys/arch/sparc64/include/autoconf.h:1.31 Sat Oct 27 17:18:12 2012 +++ src/sys/arch/sparc64/include/autoconf.h Sat Oct 26 18:47:27 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: autoconf.h,v 1.31 2012/10/27 17:18:12 chs Exp $ */ +/* $NetBSD: autoconf.h,v 1.32 2013/10/26 18:47:27 jdc Exp $ */ /*- * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. @@ -76,6 +76,10 @@ #include #include +/* Machine banner name and model name */ +extern char machine_banner[100]; +extern char machine_model[100]; + /* This is used to map device classes to IPLs */ struct intrmap { const char *in_class;
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: martin Date: Fri Sep 13 21:36:38 UTC 2013 Modified Files: src/sys/arch/sparc64/include: cpu.h Log Message: Make CPU_INFO_FOREACH more gcc 4.8.1 friendly To generate a diff of this commit: cvs rdiff -u -r1.103 -r1.104 src/sys/arch/sparc64/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/cpu.h diff -u src/sys/arch/sparc64/include/cpu.h:1.103 src/sys/arch/sparc64/include/cpu.h:1.104 --- src/sys/arch/sparc64/include/cpu.h:1.103 Tue Aug 20 19:19:23 2013 +++ src/sys/arch/sparc64/include/cpu.h Fri Sep 13 21:36:38 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.103 2013/08/20 19:19:23 macallan Exp $ */ +/* $NetBSD: cpu.h,v 1.104 2013/09/13 21:36:38 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -221,7 +221,7 @@ extern struct pool_cache *fpstate_cache; #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) #define CPU_INFO_ITERATOR int -#define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpus; ci != NULL; \ +#define CPU_INFO_FOREACH(cii, ci) (void)cii, ci = cpus; ci != NULL; \ ci = ci->ci_next #define curlwp curcpu()->ci_curlwp
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: martin Date: Sun Aug 18 09:31:38 UTC 2013 Modified Files: src/sys/arch/sparc64/include: psl.h Log Message: Remove ancient spl* variants no longer used To generate a diff of this commit: cvs rdiff -u -r1.52 -r1.53 src/sys/arch/sparc64/include/psl.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/psl.h diff -u src/sys/arch/sparc64/include/psl.h:1.52 src/sys/arch/sparc64/include/psl.h:1.53 --- src/sys/arch/sparc64/include/psl.h:1.52 Fri Nov 9 10:05:59 2012 +++ src/sys/arch/sparc64/include/psl.h Sun Aug 18 09:31:38 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.52 2012/11/09 10:05:59 nakayama Exp $ */ +/* $NetBSD: psl.h,v 1.53 2013/08/18 09:31:38 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -486,21 +486,7 @@ SPLHOLD(splfdsoft, PIL_FDSOFT) */ SPLHOLD(splvm, PIL_VM) -/* fd hardware interrupts are at level 11 */ -SPLHOLD(splfd, PIL_FD) - -/* zs hardware interrupts are at level 12 */ -SPLHOLD(splzs, PIL_SER) -SPLHOLD(splserial, PIL_SER) - -/* audio hardware interrupts are at level 13 */ -SPLHOLD(splaudio, PIL_AUD) - -/* second sparc timer interrupts at level 14 */ -SPLHOLD(splstatclock, PIL_STATCLOCK) - SPLHOLD(splsched, PIL_SCHED) -SPLHOLD(spllock, PIL_LOCK) SPLHOLD(splhigh, PIL_HIGH)
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: christos Date: Sat Mar 16 23:04:23 UTC 2013 Modified Files: src/sys/arch/sparc64/include: asm.h locore.h Log Message: move the useful macros somewhere where they can be used in userland. To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 src/sys/arch/sparc64/include/asm.h cvs rdiff -u -r1.5 -r1.6 src/sys/arch/sparc64/include/locore.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/asm.h diff -u src/sys/arch/sparc64/include/asm.h:1.19 src/sys/arch/sparc64/include/asm.h:1.20 --- src/sys/arch/sparc64/include/asm.h:1.19 Sat Jul 20 07:52:21 2002 +++ src/sys/arch/sparc64/include/asm.h Sat Mar 16 19:04:22 2013 @@ -1,3 +1,66 @@ -/* $NetBSD: asm.h,v 1.19 2002/07/20 11:52:21 mrg Exp $*/ +/* $NetBSD: asm.h,v 1.20 2013/03/16 23:04:22 christos Exp $*/ #include + +/* + * Here are some defines to try to maintain consistency but still + * support 32-and 64-bit compilers. + */ +#ifdef _LP64 +/* reg that points to base of data/text segment */ +#define BASEREG %g4 +/* first constants for storage allocation */ +#define LNGSZ 8 +#define LNGSHFT 3 +#define PTRSZ 8 +#define PTRSHFT 3 +#define POINTER .xword +#define ULONG .xword +/* Now instructions to load/store pointers & long ints */ +#define LDLNG ldx +#define LDULNG ldx +#define STLNG stx +#define STULNG stx +#define LDPTR ldx +#define LDPTRA ldxa +#define STPTR stx +#define STPTRA stxa +#define CASPTR casxa +/* Now something to calculate the stack bias */ +#define STKB BIAS +#define CCCR %xcc +#else +#define BASEREG %g0 +#define LNGSZ 4 +#define LNGSHFT 2 +#define PTRSZ 4 +#define PTRSHFT 2 +#define POINTER .word +#define ULONG .word +/* Instructions to load/store pointers & long ints */ +#define LDLNG ldsw +#define LDULNG lduw +#define STLNG stw +#define STULNG stw +#define LDPTR lduw +#define LDPTRA lduwa +#define STPTR stw +#define STPTRA stwa +#define CASPTR casa +#define STKB 0 +#define CCCR %icc +#endif + +#if defined(_KERNEL) || defined(_RUMPKERNEL) +/* Give this real authority: reset the machine */ +#define NOTREACHED sir +#else +#define NOTREACHED +#endif + +/* if < 32, copy by bytes, memcpy, kcopy, ... */ +#define BCOPY_SMALL 32 + +/* use as needed to align things on longword boundaries */ +#define _ALIGN .align 8 +#define ICACHE_ALIGN .align 32 Index: src/sys/arch/sparc64/include/locore.h diff -u src/sys/arch/sparc64/include/locore.h:1.5 src/sys/arch/sparc64/include/locore.h:1.6 --- src/sys/arch/sparc64/include/locore.h:1.5 Sat Jul 10 06:10:36 2010 +++ src/sys/arch/sparc64/include/locore.h Sat Mar 16 19:04:22 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: locore.h,v 1.5 2010/07/10 10:10:36 nakayama Exp $ */ +/* $NetBSD: locore.h,v 1.6 2013/03/16 23:04:22 christos Exp $ */ /* * Copyright (c) 1996-2002 Eduardo Horvath @@ -32,65 +32,6 @@ #define CPCB (CPUINFO_VA + CI_CPCB) #define FPLWP (CPUINFO_VA + CI_FPLWP) -/* - * Here are some defines to try to maintain consistency but still - * support 32-and 64-bit compilers. - */ -#ifdef _LP64 -/* reg that points to base of data/text segment */ -#define BASEREG %g4 -/* first constants for storage allocation */ -#define LNGSZ 8 -#define LNGSHFT 3 -#define PTRSZ 8 -#define PTRSHFT 3 -#define POINTER .xword -#define ULONG .xword -/* Now instructions to load/store pointers & long ints */ -#define LDLNG ldx -#define LDULNG ldx -#define STLNG stx -#define STULNG stx -#define LDPTR ldx -#define LDPTRA ldxa -#define STPTR stx -#define STPTRA stxa -#define CASPTR casxa -/* Now something to calculate the stack bias */ -#define STKB BIAS -#define CCCR %xcc -#else -#define BASEREG %g0 -#define LNGSZ 4 -#define LNGSHFT 2 -#define PTRSZ 4 -#define PTRSHFT 2 -#define POINTER .word -#define ULONG .word -/* Instructions to load/store pointers & long ints */ -#define LDLNG ldsw -#define LDULNG lduw -#define STLNG stw -#define STULNG stw -#define LDPTR lduw -#define LDPTRA lduwa -#define STPTR stw -#define STPTRA stwa -#define CASPTR casa -#define STKB 0 -#define CCCR %icc -#endif - -/* Give this real authority: reset the machine */ -#define NOTREACHED sir - -/* if < 32, copy by bytes, memcpy, kcopy, ... */ -#define BCOPY_SMALL 32 - -/* use as needed to align things on longword boundaries */ -#define _ALIGN .align 8 -#define ICACHE_ALIGN .align 32 - /* A few convenient abbreviations for trapframe fields. */ #define TF_G TF_GLOBAL #define TF_O TF_OUT
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Thu Nov 8 16:30:12 UTC 2012 Modified Files: src/sys/arch/sparc64/include: ctlreg.h psl.h Log Message: Move ASRs macro to more appropriate header. While there remove useless macro. To generate a diff of this commit: cvs rdiff -u -r1.57 -r1.58 src/sys/arch/sparc64/include/ctlreg.h cvs rdiff -u -r1.50 -r1.51 src/sys/arch/sparc64/include/psl.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/ctlreg.h diff -u src/sys/arch/sparc64/include/ctlreg.h:1.57 src/sys/arch/sparc64/include/ctlreg.h:1.58 --- src/sys/arch/sparc64/include/ctlreg.h:1.57 Thu Nov 8 00:34:37 2012 +++ src/sys/arch/sparc64/include/ctlreg.h Thu Nov 8 16:30:12 2012 @@ -1,4 +1,4 @@ -/* $NetBSD: ctlreg.h,v 1.57 2012/11/08 00:34:37 macallan Exp $ */ +/* $NetBSD: ctlreg.h,v 1.58 2012/11/08 16:30:12 nakayama Exp $ */ /* * Copyright (c) 1996-2002 Eduardo Horvath @@ -410,32 +410,6 @@ #define IRDR_3H 0x70 /* unimplemented */ #define IRDR_3L 0x78 /* unimplemented */ -/* SOFTINT ASRs */ -#define SET_SOFTINT %asr20 /* Sets these bits */ -#define CLEAR_SOFTINT %asr21 /* Clears these bits */ -#define SOFTINT %asr22 /* Reads the register */ -#define TICK_CMPR %asr23 -#define STICK %asr24 -#define STICK_CMPR %asr25 - -#define TICK_INT 0x01 /* level-14 clock tick */ -#define SOFTINT1 (0x1<<1) -#define SOFTINT2 (0x1<<2) -#define SOFTINT3 (0x1<<3) -#define SOFTINT4 (0x1<<4) -#define SOFTINT5 (0x1<<5) -#define SOFTINT6 (0x1<<6) -#define SOFTINT7 (0x1<<7) -#define SOFTINT8 (0x1<<8) -#define SOFTINT9 (0x1<<9) -#define SOFTINT10 (0x1<<10) -#define SOFTINT11 (0x1<<11) -#define SOFTINT12 (0x1<<12) -#define SOFTINT13 (0x1<<13) -#define SOFTINT14 (0x1<<14) -#define SOFTINT15 (0x1<<15) -#define STICK_INTR (0x1<<16) /* system tick */ - /* Interrupt Dispatch -- usually reserved for cross-calls */ #define ASR_IDSR 0x48 /* Interrupt dispatch status reg */ #define IDSR 0x00 Index: src/sys/arch/sparc64/include/psl.h diff -u src/sys/arch/sparc64/include/psl.h:1.50 src/sys/arch/sparc64/include/psl.h:1.51 --- src/sys/arch/sparc64/include/psl.h:1.50 Thu Nov 8 00:34:37 2012 +++ src/sys/arch/sparc64/include/psl.h Thu Nov 8 16:30:12 2012 @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.50 2012/11/08 00:34:37 macallan Exp $ */ +/* $NetBSD: psl.h,v 1.51 2012/11/08 16:30:12 nakayama Exp $ */ /* * Copyright (c) 1992, 1993 @@ -264,6 +264,20 @@ #define CWP 0x01f +/* + * UltraSPARC Ancillary State Registers + */ +#define SET_SOFTINT %asr20 /* Set Software Interrupt register bits */ +#define CLEAR_SOFTINT %asr21 /* Clear Software Interrupt register bits */ +#define SOFTINT %asr22 /* Software Interrupt register */ +#define TICK_CMPR %asr23 /* TICK Compare register */ +#define STICK %asr24 /* STICK register */ +#define STICK_CMPR %asr25 /* STICK Compare register */ + +/* SOFTINT bit descriptions */ +#define TICK_INT 0x01 /* CPU clock timer interrupt */ +#define STICK_INT (0x1<<16) /* system clock timer interrupt */ + /* 64-byte alignment -- this seems the best place to put this. */ #define SPARC64_BLOCK_SIZE 64 #define SPARC64_BLOCK_ALIGN 0x3f
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: martin Date: Mon May 28 21:09:52 UTC 2012 Modified Files: src/sys/arch/sparc64/include: bootinfo.h Log Message: Ooops, remove definitions duplicated in To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/sparc64/include/bootinfo.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/bootinfo.h diff -u src/sys/arch/sparc64/include/bootinfo.h:1.6 src/sys/arch/sparc64/include/bootinfo.h:1.7 --- src/sys/arch/sparc64/include/bootinfo.h:1.6 Mon May 28 19:24:30 2012 +++ src/sys/arch/sparc64/include/bootinfo.h Mon May 28 21:09:52 2012 @@ -1,4 +1,4 @@ -/* $NetBSD: bootinfo.h,v 1.6 2012/05/28 19:24:30 martin Exp $*/ +/* $NetBSD: bootinfo.h,v 1.7 2012/05/28 21:09:52 martin Exp $*/ /*- * Copyright (c) 2005 The NetBSD Foundation, Inc. @@ -98,7 +98,6 @@ #define BTINFO_ITLB 103 #define BTINFO_KERNEND 104 #define BTINFO_BOOTDEV 105 -#define BTINFO_BOOTHOWTO 106 #define LOOKUP_BOOTINFO(btp, info) \ do { \ @@ -132,9 +131,4 @@ struct btinfo_bootdev { char name[1]; }; -struct btinfo_boothowto { - struct btinfo_common common; - int boothowto; -}; - #endif /* _BOOTINFO_H_ */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Sat Mar 10 07:54:17 UTC 2012 Modified Files: src/sys/arch/sparc64/include: param.h Log Message: Fix previous, which causes an integer overflow error in uvm_km.c on 32-bit kernels. To generate a diff of this commit: cvs rdiff -u -r1.49 -r1.50 src/sys/arch/sparc64/include/param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/param.h diff -u src/sys/arch/sparc64/include/param.h:1.49 src/sys/arch/sparc64/include/param.h:1.50 --- src/sys/arch/sparc64/include/param.h:1.49 Fri Mar 9 10:42:12 2012 +++ src/sys/arch/sparc64/include/param.h Sat Mar 10 07:54:17 2012 @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.49 2012/03/09 10:42:12 jdc Exp $ */ +/* $NetBSD: param.h,v 1.50 2012/03/10 07:54:17 nakayama Exp $ */ /* * Copyright (c) 1992, 1993 @@ -200,7 +200,7 @@ extern int nbpg, pgofset, pgshift; */ #define NKMEMPAGES_MIN_DEFAULT ((64 * 1024 * 1024) >> PAGE_SHIFT) #undef NKMEMPAGES_MAX_UNLIMITED -#define NKMEMPAGES_MAX_DEFAULT ((2048L * 1024 * 1024) >> PAGE_SHIFT) +#define NKMEMPAGES_MAX_DEFAULT ((2048UL * 1024 * 1024) >> PAGE_SHIFT) #ifdef _KERNEL #ifndef _LOCORE
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: jdc Date: Fri Mar 9 10:42:12 UTC 2012 Modified Files: src/sys/arch/sparc64/include: param.h Log Message: Restrict NKMEMPAGES to 2.5GB, otherwise we will run out of space in the kernel_map on machines with 8GB (or more) main memory. XXX: Moving KERNBASE/KERNEND is a better long term solution, but this allows those machines to boot now. To generate a diff of this commit: cvs rdiff -u -r1.48 -r1.49 src/sys/arch/sparc64/include/param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/param.h diff -u src/sys/arch/sparc64/include/param.h:1.48 src/sys/arch/sparc64/include/param.h:1.49 --- src/sys/arch/sparc64/include/param.h:1.48 Sat Feb 4 17:56:16 2012 +++ src/sys/arch/sparc64/include/param.h Fri Mar 9 10:42:12 2012 @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.48 2012/02/04 17:56:16 para Exp $ */ +/* $NetBSD: param.h,v 1.49 2012/03/09 10:42:12 jdc Exp $ */ /* * Copyright (c) 1992, 1993 @@ -195,10 +195,12 @@ extern int nbpg, pgofset, pgshift; /* * Minimum size of the kernel kmem_arena in PAGE_SIZE-sized * logical pages. - * No enforced maximum on sparc64. + * Maximum of 2.5GB on sparc64 (it must fit into KERNEND - KERNBASE, and also + * leave space in the kernel_map for other allocations). */ #define NKMEMPAGES_MIN_DEFAULT ((64 * 1024 * 1024) >> PAGE_SHIFT) -#define NKMEMPAGES_MAX_UNLIMITED 1 +#undef NKMEMPAGES_MAX_UNLIMITED +#define NKMEMPAGES_MAX_DEFAULT ((2048L * 1024 * 1024) >> PAGE_SHIFT) #ifdef _KERNEL #ifndef _LOCORE
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: mrg Date: Thu Oct 6 06:55:35 UTC 2011 Modified Files: src/sys/arch/sparc64/include: pmap.h Log Message: make struct page_size_map consistent across DEBUG/!DEBUG kernels. To generate a diff of this commit: cvs rdiff -u -r1.54 -r1.55 src/sys/arch/sparc64/include/pmap.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/pmap.h diff -u src/sys/arch/sparc64/include/pmap.h:1.54 src/sys/arch/sparc64/include/pmap.h:1.55 --- src/sys/arch/sparc64/include/pmap.h:1.54 Sun Jun 12 03:35:47 2011 +++ src/sys/arch/sparc64/include/pmap.h Thu Oct 6 06:55:34 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.54 2011/06/12 03:35:47 rmind Exp $ */ +/* $NetBSD: pmap.h,v 1.55 2011/10/06 06:55:34 mrg Exp $ */ /*- * Copyright (C) 1995, 1996 Wolfgang Solfrank. @@ -97,7 +97,7 @@ struct page_size_map { uint64_t mask; uint64_t code; -#ifdef DEBUG +#if defined(DEBUG) || 1 uint64_t use; #endif };
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: dyoung Date: Fri Jul 1 20:59:39 UTC 2011 Modified Files: src/sys/arch/sparc64/include: autoconf.h z8530var.h Log Message: #include instead of . To generate a diff of this commit: cvs rdiff -u -r1.29 -r1.30 src/sys/arch/sparc64/include/autoconf.h cvs rdiff -u -r1.12 -r1.13 src/sys/arch/sparc64/include/z8530var.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/autoconf.h diff -u src/sys/arch/sparc64/include/autoconf.h:1.29 src/sys/arch/sparc64/include/autoconf.h:1.30 --- src/sys/arch/sparc64/include/autoconf.h:1.29 Sat Mar 12 11:43:38 2011 +++ src/sys/arch/sparc64/include/autoconf.h Fri Jul 1 20:59:38 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: autoconf.h,v 1.29 2011/03/12 11:43:38 nakayama Exp $ */ +/* $NetBSD: autoconf.h,v 1.30 2011/07/01 20:59:38 dyoung Exp $ */ /*- * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. @@ -73,7 +73,7 @@ * Autoconfiguration information. */ -#include +#include #include /* This is used to map device classes to IPLs */ Index: src/sys/arch/sparc64/include/z8530var.h diff -u src/sys/arch/sparc64/include/z8530var.h:1.12 src/sys/arch/sparc64/include/z8530var.h:1.13 --- src/sys/arch/sparc64/include/z8530var.h:1.12 Sat Mar 29 19:15:35 2008 +++ src/sys/arch/sparc64/include/z8530var.h Fri Jul 1 20:59:39 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: z8530var.h,v 1.12 2008/03/29 19:15:35 tsutsui Exp $ */ +/* $NetBSD: z8530var.h,v 1.13 2011/07/01 20:59:39 dyoung Exp $ */ /* * Copyright (c) 1992, 1993 @@ -40,7 +40,7 @@ * @(#)zsvar.h 8.1 (Berkeley) 6/11/93 */ -#include +#include #include #include "kbd.h" /* NKBD */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Fri May 27 12:41:18 UTC 2011 Modified Files: src/sys/arch/sparc64/include: db_machdep.h Log Message: Fix 32-bit kernel build. To generate a diff of this commit: cvs rdiff -u -r1.30 -r1.31 src/sys/arch/sparc64/include/db_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/db_machdep.h diff -u src/sys/arch/sparc64/include/db_machdep.h:1.30 src/sys/arch/sparc64/include/db_machdep.h:1.31 --- src/sys/arch/sparc64/include/db_machdep.h:1.30 Thu May 26 15:34:13 2011 +++ src/sys/arch/sparc64/include/db_machdep.h Fri May 27 12:41:18 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: db_machdep.h,v 1.30 2011/05/26 15:34:13 joerg Exp $ */ +/* $NetBSD: db_machdep.h,v 1.31 2011/05/27 12:41:18 nakayama Exp $ */ /* * Mach Operating System @@ -46,7 +46,11 @@ /* use 64-bit types explicitly for 32-bit kernels */ typedef vaddr_t db_addr_t; /* address - unsigned */ +#ifdef __arch64__ #define DDB_EXPR_FMT "l" /* expression is int64_t (long) */ +#else +#define DDB_EXPR_FMT "ll" /* expression is int64_t (long long) */ +#endif typedef int64_t db_expr_t; /* expression - signed */ struct trapstate {
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: mrg Date: Thu May 12 05:42:05 UTC 2011 Modified Files: src/sys/arch/sparc64/include: psl.h Log Message: first steps towards fujitsu SPARC64 support: - add IMPL_* defines for fujitsu SPARC64 processors (mostly from openbsd) - rename CPU_IS_JALAPENO() as CPU_IS_USIIIi() - add GETVER_CPU_MANUF() - add CPU_IS_SPITFIRE() and CPU_IS_SPARC64_V_UP() To generate a diff of this commit: cvs rdiff -u -r1.46 -r1.47 src/sys/arch/sparc64/include/psl.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/psl.h diff -u src/sys/arch/sparc64/include/psl.h:1.46 src/sys/arch/sparc64/include/psl.h:1.47 --- src/sys/arch/sparc64/include/psl.h:1.46 Mon Feb 1 05:00:59 2010 +++ src/sys/arch/sparc64/include/psl.h Thu May 12 05:42:05 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.46 2010/02/01 05:00:59 mrg Exp $ */ +/* $NetBSD: psl.h,v 1.47 2011/05/12 05:42:05 mrg Exp $ */ /* * Copyright (c) 1992, 1993 @@ -224,6 +224,14 @@ #define VER_MAXTL_SHIFT 8 #define VER_MAXWIN 0x001fLL +#define IMPL_SPARC64 0x01 /* SPARC64 */ +#define IMPL_SPARC64_II 0x02 /* SPARC64-II */ +#define IMPL_SPARC64_III 0x03 /* SPARC64-III */ +#define IMPL_SPARC64_IV 0x04 /* SPARC64-IV */ +#define IMPL_ZEUS 0x05 /* SPARC64-V */ +#define IMPL_OLYMPUS_C 0x06 /* SPARC64-VI */ +#define IMPL_JUPITER 0x07 /* SPARC64-VII */ + #define IMPL_SPITFIRE 0x10 /* UltraSPARC-I */ #define IMPL_BLACKBIRD 0x11 /* UltraSPARC-II */ #define IMPL_SABRE 0x12 /* UltraSPARC-IIi */ @@ -317,8 +325,13 @@ /* Some simple macros to check the cpu type. */ #define GETVER_CPU_IMPL() ((getver() & VER_IMPL) >> VER_IMPL_SHIFT) -#define CPU_IS_JALAPENO() (GETVER_CPU_IMPL() == IMPL_JALAPENO) +#define GETVER_CPU_MANUF() ((getver() & VER_MANUF) >> VER_MANUF_SHIFT) +#define CPU_IS_SPITFIRE() (GETVER_CPU_IMPL() == IMPL_SPITFIRE) +#define CPU_IS_USIIIi() ((GETVER_CPU_IMPL() == IMPL_JALAPENO) || \ + (GETVER_CPU_IMPL() == IMPL_SERRANO)) #define CPU_IS_USIII_UP() (GETVER_CPU_IMPL() >= IMPL_CHEETAH) +#define CPU_IS_SPARC64_V_UP() (GETVER_CPU_MANUF() == MANUF_FUJITSU && \ + GETVER_CPU_IMPL() >= IMPL_ZEUS) static __inline int intr_disable(void)
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: mrg Date: Thu May 12 05:41:50 UTC 2011 Modified Files: src/sys/arch/sparc64/include: param.h Log Message: first steps towards fujitsu SPARC64 support: - add CPU_SUN4US and CPU_SUN4V defines - re-introduce "cputyp" and use it for sun4u/sun4us/sun4v To generate a diff of this commit: cvs rdiff -u -r1.44 -r1.45 src/sys/arch/sparc64/include/param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/param.h diff -u src/sys/arch/sparc64/include/param.h:1.44 src/sys/arch/sparc64/include/param.h:1.45 --- src/sys/arch/sparc64/include/param.h:1.44 Mon Feb 8 19:02:32 2010 +++ src/sys/arch/sparc64/include/param.h Thu May 12 05:41:50 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.44 2010/02/08 19:02:32 joerg Exp $ */ +/* $NetBSD: param.h,v 1.45 2011/05/12 05:41:50 mrg Exp $ */ /* * Copyright (c) 1992, 1993 @@ -230,6 +230,10 @@ extern int cputyp; +#define CPU_ISSUN4U (cputyp == CPU_SUN4U) +#define CPU_ISSUN4US(cputyp == CPU_SUN4US) +#define CPU_ISSUN4V (cputyp == CPU_SUN4V) + #endif /* _LOCORE */ #endif /* _KERNEL */ @@ -240,6 +244,8 @@ #define CPU_SUN4C 1 #define CPU_SUN4M 2 #define CPU_SUN4U 3 +#define CPU_SUN4US 4 +#define CPU_SUN4V 5 /* * Shorthand CPU-type macros. Enumerate all eight cases. @@ -255,7 +261,6 @@ * extra memory references they'll generate. */ -#define CPU_ISSUN4U (1) #define CPU_ISSUN4M (0) #define CPU_ISSUN4C (0) #define CPU_ISSUN4 (0)
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: mrg Date: Wed Apr 13 03:40:00 UTC 2011 Modified Files: src/sys/arch/sparc64/include: cpu.h Log Message: re-include sparc64/sparc64/intreg.h in kernel mode. it's necessary. To generate a diff of this commit: cvs rdiff -u -r1.95 -r1.96 src/sys/arch/sparc64/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/cpu.h diff -u src/sys/arch/sparc64/include/cpu.h:1.95 src/sys/arch/sparc64/include/cpu.h:1.96 --- src/sys/arch/sparc64/include/cpu.h:1.95 Wed Apr 13 03:35:19 2011 +++ src/sys/arch/sparc64/include/cpu.h Wed Apr 13 03:40:00 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.95 2011/04/13 03:35:19 mrg Exp $ */ +/* $NetBSD: cpu.h,v 1.96 2011/04/13 03:40:00 mrg Exp $ */ /* * Copyright (c) 1992, 1993 @@ -68,6 +68,7 @@ #include #if defined(_KERNEL) #include +#include #endif #include
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: mrg Date: Wed Apr 13 03:35:19 UTC 2011 Modified Files: src/sys/arch/sparc64/include: cpu.h Log Message: export a bunch of things to _KMEMUSER as well. XXX: should consolidate the curcpu/curlwp definitions. To generate a diff of this commit: cvs rdiff -u -r1.94 -r1.95 src/sys/arch/sparc64/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/cpu.h diff -u src/sys/arch/sparc64/include/cpu.h:1.94 src/sys/arch/sparc64/include/cpu.h:1.95 --- src/sys/arch/sparc64/include/cpu.h:1.94 Mon Jan 24 10:04:28 2011 +++ src/sys/arch/sparc64/include/cpu.h Wed Apr 13 03:35:19 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.94 2011/01/24 10:04:28 martin Exp $ */ +/* $NetBSD: cpu.h,v 1.95 2011/04/13 03:35:19 mrg Exp $ */ /* * Copyright (c) 1992, 1993 @@ -52,7 +52,7 @@ #define CPU_ARCH 4 /* integer: cpu architecture version */ #define CPU_MAXID 5 /* number of valid machdep ids */ -#ifdef _KERNEL +#if defined(_KERNEL) || defined(_KMEMUSER) /* * Exported definitions unique to SPARC cpu support. */ @@ -66,11 +66,13 @@ #include #include #include +#if defined(_KERNEL) #include -#include +#endif #include #include + /* * The cpu_info structure is part of a 64KB structure mapped both the kernel * pmap and a single locked TTE a CPUINFO_VA for that particular processor. @@ -172,6 +174,10 @@ volatile void *ci_ddb_regs; /* DDB regs */ }; +#endif /* _KERNEL || _KMEMUSER */ + +#ifdef _KERNEL + #define CPUF_PRIMARY 1 /* @@ -381,5 +387,15 @@ int fixalign(struct lwp *, struct trapframe64 *); int emulinstr(vaddr_t, struct trapframe64 *); +#else /* _KERNEL */ + +/* + * XXX: provide some definitions for crash(8), probably can share + */ +#if defined(_KMEMUSER) +#define curcpu() (((struct cpu_info *)CPUINFO_VA)->ci_self) +#define curlwp curcpu()->ci_curlwp +#endif + #endif /* _KERNEL */ #endif /* _CPU_H_ */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: mrg Date: Wed Apr 13 03:22:49 UTC 2011 Modified Files: src/sys/arch/sparc64/include: db_machdep.h Log Message: this needs sys/types.h in userspace. To generate a diff of this commit: cvs rdiff -u -r1.28 -r1.29 src/sys/arch/sparc64/include/db_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/db_machdep.h diff -u src/sys/arch/sparc64/include/db_machdep.h:1.28 src/sys/arch/sparc64/include/db_machdep.h:1.29 --- src/sys/arch/sparc64/include/db_machdep.h:1.28 Mon Apr 11 10:41:17 2011 +++ src/sys/arch/sparc64/include/db_machdep.h Wed Apr 13 03:22:49 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: db_machdep.h,v 1.28 2011/04/11 10:41:17 mrg Exp $ */ +/* $NetBSD: db_machdep.h,v 1.29 2011/04/13 03:22:49 mrg Exp $ */ /* * Mach Operating System @@ -33,6 +33,8 @@ * Machine-dependent defines for new kernel debugger. */ +#include + #include #include
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: mrg Date: Mon Apr 11 10:41:17 UTC 2011 Modified Files: src/sys/arch/sparc64/include: db_machdep.h Log Message: remove DB_AOUT_SYMBOLS. To generate a diff of this commit: cvs rdiff -u -r1.27 -r1.28 src/sys/arch/sparc64/include/db_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/db_machdep.h diff -u src/sys/arch/sparc64/include/db_machdep.h:1.27 src/sys/arch/sparc64/include/db_machdep.h:1.28 --- src/sys/arch/sparc64/include/db_machdep.h:1.27 Fri Jan 14 02:06:32 2011 +++ src/sys/arch/sparc64/include/db_machdep.h Mon Apr 11 10:41:17 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: db_machdep.h,v 1.27 2011/01/14 02:06:32 rmind Exp $ */ +/* $NetBSD: db_machdep.h,v 1.28 2011/04/11 10:41:17 mrg Exp $ */ /* * Mach Operating System @@ -124,18 +124,15 @@ int kdb_trap(int, struct trapframe64 *); /* - * We will use elf symbols in DDB when they work. + * We use elf symbols in DDB. */ -#if 1 #define DB_ELF_SYMBOLS #ifdef __arch64__ #define DB_ELFSIZE 64 #else #define DB_ELFSIZE 32 #endif -#else -#define DB_AOUT_SYMBOLS -#endif + /* * KGDB definitions */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: mrg Date: Wed Mar 16 02:35:48 UTC 2011 Modified Files: src/sys/arch/sparc64/include: ctlreg.h Log Message: add some control registers found on the Fire and Jupiter busses. from openbsd. To generate a diff of this commit: cvs rdiff -u -r1.54 -r1.55 src/sys/arch/sparc64/include/ctlreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/ctlreg.h diff -u src/sys/arch/sparc64/include/ctlreg.h:1.54 src/sys/arch/sparc64/include/ctlreg.h:1.55 --- src/sys/arch/sparc64/include/ctlreg.h:1.54 Sat Dec 18 05:45:43 2010 +++ src/sys/arch/sparc64/include/ctlreg.h Wed Mar 16 02:35:48 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: ctlreg.h,v 1.54 2010/12/18 05:45:43 mrg Exp $ */ +/* $NetBSD: ctlreg.h,v 1.55 2011/03/16 02:35:48 mrg Exp $ */ /* * Copyright (c) 1996-2002 Eduardo Horvath @@ -210,6 +210,14 @@ #else #define CPU_UPAID UPA_CR_MID(ldxa(0, ASI_MID_REG)) #endif + +/* Get the CPU's Fireplane agent ID */ +#define FIREPLANE_CR_AID(x) (((x) >> 17) & 0x3ff) +#define CPU_FIREPLANEID FIREPLANE_CR_AID(ldxa(0, ASI_MID_REG)) + +/* Get the CPU's Jupiter Bus interrupt target ID */ +#define JUPITER_CR_ITID(x) ((x) & 0x3ff) +#define CPU_JUPITERID JUPITER_CR_ITID(ldxa(0, ASI_MID_REG)) /* * [4u] MMU and Cache Control Register (MCCR)
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: martin Date: Mon Jan 24 10:04:28 UTC 2011 Modified Files: src/sys/arch/sparc64/include: cpu.h Log Message: Provide LWP_PC To generate a diff of this commit: cvs rdiff -u -r1.93 -r1.94 src/sys/arch/sparc64/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/cpu.h diff -u src/sys/arch/sparc64/include/cpu.h:1.93 src/sys/arch/sparc64/include/cpu.h:1.94 --- src/sys/arch/sparc64/include/cpu.h:1.93 Sun Dec 26 12:06:57 2010 +++ src/sys/arch/sparc64/include/cpu.h Mon Jan 24 10:04:28 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.93 2010/12/26 12:06:57 martin Exp $ */ +/* $NetBSD: cpu.h,v 1.94 2011/01/24 10:04:28 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -264,6 +264,9 @@ #endif +/* Provide %pc of a lwp */ +#define LWP_PC(l) ((l)->l_md.md_tf->tf_pc) + /* * Arguments to hardclock, softclock and gatherstats encapsulate the * previous machine state in an opaque clockframe. The ipl is here
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: mrg Date: Sat Dec 18 05:45:44 UTC 2010 Modified Files: src/sys/arch/sparc64/include: ctlreg.h Log Message: add a bit for MCCR_RAW_EN -- enable read-after-write. To generate a diff of this commit: cvs rdiff -u -r1.53 -r1.54 src/sys/arch/sparc64/include/ctlreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/ctlreg.h diff -u src/sys/arch/sparc64/include/ctlreg.h:1.53 src/sys/arch/sparc64/include/ctlreg.h:1.54 --- src/sys/arch/sparc64/include/ctlreg.h:1.53 Sat Jul 10 10:10:36 2010 +++ src/sys/arch/sparc64/include/ctlreg.h Sat Dec 18 05:45:43 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: ctlreg.h,v 1.53 2010/07/10 10:10:36 nakayama Exp $ */ +/* $NetBSD: ctlreg.h,v 1.54 2010/12/18 05:45:43 mrg Exp $ */ /* * Copyright (c) 1996-2002 Eduardo Horvath @@ -223,6 +223,7 @@ #define MCCR_IMMU_EN 0x04 #define MCCR_DCACHE_EN 0x02 #define MCCR_ICACHE_EN 0x01 +#define MCCR_RAW_EN 0x4000 /*
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: mrg Date: Mon Dec 13 06:40:13 UTC 2010 Modified Files: src/sys/arch/sparc64/include: trap.h Log Message: add definitions for T_DATA_MMU_MISS, T_FAST_ECC_ERROR, T_DC_PAR_ERR and T_IC_PAR_ERR, all are >= USIII only. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/sparc64/include/trap.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/trap.h diff -u src/sys/arch/sparc64/include/trap.h:1.6 src/sys/arch/sparc64/include/trap.h:1.7 --- src/sys/arch/sparc64/include/trap.h:1.6 Tue Sep 19 00:55:35 2006 +++ src/sys/arch/sparc64/include/trap.h Mon Dec 13 06:40:13 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: trap.h,v 1.6 2006/09/19 00:55:35 mrg Exp $ */ +/* $NetBSD: trap.h,v 1.7 2010/12/13 06:40:13 mrg Exp $ */ /* * Copyright (c) 1996-1999 Eduardo Horvath @@ -52,12 +52,12 @@ #define T_CLEAN_WINDOW 0x024 /* (10) clean window exception */ /* through 0x027 unused */ #define T_IDIV0 0x028 /* (15) division by 0 */ -/* 0x02a unused */ +/* 0x029 unused */ /* through 0x02f unused */ #define T_DATAFAULT 0x030 /* (12) address fault during data fetch */ -/* 0x031 unused */ -#define T_DATA_ERROR 0x032 -#define T_DATA_PROT 0x033 /* Data protection ??? */ +#define T_DATA_MMU_MISS 0x031 /* (N/A) address fault during data fetch [USIII] */ +#define T_DATA_ERROR 0x032 /* (12) data access error */ +#define T_DATA_PROT 0x033 /* (12) Data protection ??? */ #define T_ALIGN 0x034 /* (10) address not properly aligned */ #define T_LDDF_ALIGN 0x035 /* (10) LDDF address not properly aligned */ #define T_STDF_ALIGN 0x036 /* (10) STDF address not properly aligned */ @@ -93,6 +93,9 @@ #define T_FDMMU_PROT 0x06c /* (2) fast data access protection */ /* through 0x06f unused */ /* 0x070...0x07f implementation dependent exceptions */ +#define T_FAST_ECC_ERROR 0x070 /* (2) fast ECC error [USIII] */ +#define T_DC_PAR_ERR 0x071 /* (2) dcache parity error [USIII] */ +#define T_IC_PAR_ERR 0x072 /* (2) icache parity error [USIII] */ #define T_SPILL_N_NORM 0x080 /* (9) spill (n=0..7) normal */ /* through 0x09f unused */ #define T_SPILL_N_OTHER 0x0a0 /* (9) spill (n=0..7) other */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: mrg Date: Tue Feb 23 22:52:21 UTC 2010 Modified Files: src/sys/arch/sparc64/include: pmap.h Log Message: oops. don't call sp_tlb_flush_pte_usiii() on USI/USII. To generate a diff of this commit: cvs rdiff -u -r1.47 -r1.48 src/sys/arch/sparc64/include/pmap.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/pmap.h diff -u src/sys/arch/sparc64/include/pmap.h:1.47 src/sys/arch/sparc64/include/pmap.h:1.48 --- src/sys/arch/sparc64/include/pmap.h:1.47 Tue Feb 2 04:28:56 2010 +++ src/sys/arch/sparc64/include/pmap.h Tue Feb 23 22:52:21 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.47 2010/02/02 04:28:56 mrg Exp $ */ +/* $NetBSD: pmap.h,v 1.48 2010/02/23 22:52:21 mrg Exp $ */ /*- * Copyright (C) 1995, 1996 Wolfgang Solfrank. @@ -221,7 +221,7 @@ if (CPU_IS_USIII_UP()) sp_tlb_flush_pte_usiii(va, pm->pm_ctx); else - sp_tlb_flush_pte_usiii(va, pm->pm_ctx); + sp_tlb_flush_pte_us(va, pm->pm_ctx); } #endif
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: mrg Date: Sun Feb 21 00:57:44 UTC 2010 Modified Files: src/sys/arch/sparc64/include: ctlreg.h Log Message: s/D-cache/I-cache/ in some comments. To generate a diff of this commit: cvs rdiff -u -r1.50 -r1.51 src/sys/arch/sparc64/include/ctlreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/ctlreg.h diff -u src/sys/arch/sparc64/include/ctlreg.h:1.50 src/sys/arch/sparc64/include/ctlreg.h:1.51 --- src/sys/arch/sparc64/include/ctlreg.h:1.50 Sat Feb 13 08:46:23 2010 +++ src/sys/arch/sparc64/include/ctlreg.h Sun Feb 21 00:57:44 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: ctlreg.h,v 1.50 2010/02/13 08:46:23 mrg Exp $ */ +/* $NetBSD: ctlreg.h,v 1.51 2010/02/21 00:57:44 mrg Exp $ */ /* * Copyright (c) 1996-2002 Eduardo Horvath @@ -79,12 +79,12 @@ #define ASI_AFSR 0x4c /* [4u] asynchronous fault status register */ #define ASI_AFAR 0x4d /* [4u] asynchronous fault address register */ -#define ASI_ICACHE_DATA 0x66 /* [4u] diagnostic access to D-cache data RAM */ -#define ASI_ICACHE_TAG 0x67 /* [4u] diagnostic access to D-cache tag RAM */ -#define ASI_FLUSH_I_PAGE_PRIMARY 0x68 /* [4u] flush D-cache page using primary context */ -#define ASI_FLUSH_I_PAGE_SECONDARY 0x69 /* [4u] flush D-cache page using secondary context */ -#define ASI_FLUSH_I_CTX_PRIMARY 0x6a /* [4u] flush D-cache context using primary context */ -#define ASI_FLUSH_I_CTX_SECONDARY 0x6b /* [4u] flush D-cache context using secondary context */ +#define ASI_ICACHE_DATA 0x66 /* [4u] diagnostic access to I-cache data RAM */ +#define ASI_ICACHE_TAG 0x67 /* [4u] diagnostic access to I-cache tag RAM */ +#define ASI_FLUSH_I_PAGE_PRIMARY 0x68 /* [4u] flush I-cache page using primary context */ +#define ASI_FLUSH_I_PAGE_SECONDARY 0x69 /* [4u] flush I-cache page using secondary context */ +#define ASI_FLUSH_I_CTX_PRIMARY 0x6a /* [4u] flush I-cache context using primary context */ +#define ASI_FLUSH_I_CTX_SECONDARY 0x6b /* [4u] flush I-cache context using secondary context */ #define ASI_BLOCK_AS_IF_USER_PRIMARY 0x70 /* [4u] primary user address space, block loads/stores */ #define ASI_BLOCK_AS_IF_USER_SECONDARY 0x71 /* [4u] secondary user address space, block loads/stores */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: mrg Date: Sat Feb 13 08:46:23 UTC 2010 Modified Files: src/sys/arch/sparc64/include: ctlreg.h Log Message: add some defines for the sizes of TLBs in various CPUs. To generate a diff of this commit: cvs rdiff -u -r1.49 -r1.50 src/sys/arch/sparc64/include/ctlreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/ctlreg.h diff -u src/sys/arch/sparc64/include/ctlreg.h:1.49 src/sys/arch/sparc64/include/ctlreg.h:1.50 --- src/sys/arch/sparc64/include/ctlreg.h:1.49 Mon Feb 1 06:26:15 2010 +++ src/sys/arch/sparc64/include/ctlreg.h Sat Feb 13 08:46:23 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: ctlreg.h,v 1.49 2010/02/01 06:26:15 mrg Exp $ */ +/* $NetBSD: ctlreg.h,v 1.50 2010/02/13 08:46:23 mrg Exp $ */ /* * Copyright (c) 1996-2002 Eduardo Horvath @@ -365,6 +365,17 @@ #define DEMAP_ALL ((0x08)<<4) /* Demap all non-locked TLB entries [USIII] */ /* + * These define the sizes of the TLB in various CPUs. + * They're mostly not necessary except for diagnostic code. + */ +#define TLB_SIZE_SPITFIRE 64 +#define TLB_SIZE_CHEETAH_I16 16 +#define TLB_SIZE_CHEETAH_I128 128 +#define TLB_SIZE_CHEETAH_D16 16 +#define TLB_SIZE_CHEETAH_D512_0 512 +#define TLB_SIZE_CHEETAH_D512_1 512 + +/* * Interrupt registers. This really gets hairy. */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Fri Jan 15 23:55:55 UTC 2010 Modified Files: src/sys/arch/sparc64/include: psl.h Log Message: Add processor implementation codes, from OpenBSD. To generate a diff of this commit: cvs rdiff -u -r1.44 -r1.45 src/sys/arch/sparc64/include/psl.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/psl.h diff -u src/sys/arch/sparc64/include/psl.h:1.44 src/sys/arch/sparc64/include/psl.h:1.45 --- src/sys/arch/sparc64/include/psl.h:1.44 Fri Jan 15 15:05:02 2010 +++ src/sys/arch/sparc64/include/psl.h Fri Jan 15 23:55:55 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.44 2010/01/15 15:05:02 nakayama Exp $ */ +/* $NetBSD: psl.h,v 1.45 2010/01/15 23:55:55 nakayama Exp $ */ /* * Copyright (c) 1992, 1993 @@ -224,6 +224,17 @@ #define VER_MAXTL_SHIFT 8 #define VER_MAXWIN 0x001fLL +#define IMPL_SPITFIRE 0x10 /* UltraSPARC-I */ +#define IMPL_BLACKBIRD 0x11 /* UltraSPARC-II */ +#define IMPL_SABRE 0x12 /* UltraSPARC-IIi */ +#define IMPL_HUMMINGBIRD 0x13 /* UltraSPARC-IIe */ +#define IMPL_CHEETAH 0x14 /* UltraSPARC-III */ +#define IMPL_CHEETAH_PLUS 0x15 /* UltraSPARC-III+ */ +#define IMPL_JALAPENO 0x16 /* UltraSPARC-IIIi */ +#define IMPL_JAGUAR 0x18 /* UltraSPARC-IV */ +#define IMPL_PANTHER 0x19 /* UltraSPARC-IV+ */ +#define IMPL_SERRANO 0x22 /* UltraSPARC-IIIi+ */ + /* * Here are a few things to help us transition between user and kernel mode: */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Fri Jan 15 15:05:02 UTC 2010 Modified Files: src/sys/arch/sparc64/include: psl.h Log Message: Add function names defined by macro in comment for reference. To generate a diff of this commit: cvs rdiff -u -r1.43 -r1.44 src/sys/arch/sparc64/include/psl.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/psl.h diff -u src/sys/arch/sparc64/include/psl.h:1.43 src/sys/arch/sparc64/include/psl.h:1.44 --- src/sys/arch/sparc64/include/psl.h:1.43 Fri Dec 4 17:31:06 2009 +++ src/sys/arch/sparc64/include/psl.h Fri Jan 15 15:05:02 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.43 2009/12/04 17:31:06 nakayama Exp $ */ +/* $NetBSD: psl.h,v 1.44 2010/01/15 15:05:02 nakayama Exp $ */ /* * Copyright (c) 1992, 1993 @@ -287,22 +287,22 @@ #endif /* Tick Register (PR 4) */ -SPARC64_GETPR64_DEF(tick) -SPARC64_SETPR64_DEF(tick) +SPARC64_GETPR64_DEF(tick) /* gettick() */ +SPARC64_SETPR64_DEF(tick) /* settick() */ /* Processor State Register (PR 6) */ -SPARC64_GETPR_DEF(pstate, int) -SPARC64_SETPR_DEF(pstate, int) +SPARC64_GETPR_DEF(pstate, int) /* getpstate() */ +SPARC64_SETPR_DEF(pstate, int) /* setpstate() */ /* Trap Level Register (PR 7) */ -SPARC64_GETPR_DEF(tl, int) +SPARC64_GETPR_DEF(tl, int) /* gettl() */ /* Current Window Pointer Register (PR 9) */ -SPARC64_GETPR_DEF(cwp, int) -SPARC64_SETPR_DEF(cwp, int) +SPARC64_GETPR_DEF(cwp, int) /* getcwp() */ +SPARC64_SETPR_DEF(cwp, int) /* setcwp() */ /* Version Register (PR 31) */ -SPARC64_GETPR64_DEF(ver) +SPARC64_GETPR64_DEF(ver) /* getver() */ static __inline int intr_disable(void)
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Fri Jan 15 15:02:48 UTC 2010 Modified Files: src/sys/arch/sparc64/include: pte.h Log Message: Fix typo in previous. To generate a diff of this commit: cvs rdiff -u -r1.21 -r1.22 src/sys/arch/sparc64/include/pte.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/pte.h diff -u src/sys/arch/sparc64/include/pte.h:1.21 src/sys/arch/sparc64/include/pte.h:1.22 --- src/sys/arch/sparc64/include/pte.h:1.21 Sat Dec 5 22:24:11 2009 +++ src/sys/arch/sparc64/include/pte.h Fri Jan 15 15:02:48 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: pte.h,v 1.21 2009/12/05 22:24:11 mrg Exp $ */ +/* $NetBSD: pte.h,v 1.22 2010/01/15 15:02:48 nakayama Exp $ */ /* * Copyright (c) 1996-1999 Eduardo Horvath @@ -49,7 +49,7 @@ * data_size:2, (page size [8K*8**]) * data_nfo:1, (no-fault only) * data_ie:1, (invert endianness [inefficient]) - * data_soft9:9, (reserved for S/W) + * data_soft2:9, (reserved for S/W) * data_reserved:7,(reserved for future use) * data_pa:30, (physical address) * data_soft:6, (reserved for S/W)
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: mrg Date: Sat Dec 5 22:24:11 UTC 2009 Modified Files: src/sys/arch/sparc64/include: pte.h Log Message: - update the TLB_SOFT2_MASK and TLB_DIAG_MASK definitions for USIII. partly from openbsd. - rename TLB_DIAG_MASK to TLB_RESERVED_MASK. from openbsd. - fix the TLB_PA_MASK definition to be correct. our old one was 4 bits too wide. - fix various errors in the #if 0 bitfield version of struct sun4u_tag_fields. tested on U60 and SB2500. To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/sparc64/include/pte.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/pte.h diff -u src/sys/arch/sparc64/include/pte.h:1.20 src/sys/arch/sparc64/include/pte.h:1.21 --- src/sys/arch/sparc64/include/pte.h:1.20 Fri Mar 14 15:40:02 2008 +++ src/sys/arch/sparc64/include/pte.h Sat Dec 5 22:24:11 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: pte.h,v 1.20 2008/03/14 15:40:02 nakayama Exp $ */ +/* $NetBSD: pte.h,v 1.21 2009/12/05 22:24:11 mrg Exp $ */ /* * Copyright (c) 1996-1999 Eduardo Horvath @@ -41,15 +41,17 @@ * * struct sun4u_tte { * uint64 tag_g:1, (global flag) - * tag_ctxt:15, (context for mapping) + * tag_reserved:2, (reserved for future use) + * tag_ctxt:13, (context for mapping) * tag_unassigned:6, * tag_va:42; (virtual address bits<64:22>) * uint64 data_v:1, (valid bit) * data_size:2, (page size [8K*8**]) * data_nfo:1, (no-fault only) * data_ie:1, (invert endianness [inefficient]) - * data_soft2:2, (reserved for S/W) - * data_pa:36, (physical address) + * data_soft9:9, (reserved for S/W) + * data_reserved:7,(reserved for future use) + * data_pa:30, (physical address) * data_soft:6, (reserved for S/W) * data_lock:1, (lock into TLB) * data_cacheable:2, (cacheability control) @@ -91,23 +93,25 @@ #if 0 /* We don't use bitfeilds anyway. */ struct sun4u_tag_fields { - uint64_t tag_g:1, /* global flag */ - tag_ctxt:15, /* context for mapping */ + uint64_t tag_g:1, /* global flag */ + tag_reserved:2, /* reserved for future use */ + tag_ctxt:13, /* context for mapping */ tag_unassigned:6, tag_va:42; /* virtual address bits<64:22> */ }; union sun4u_tag { struct sun4u_tag_fields f; int64_t tag; }; struct sun4u_data_fields { - uint64_t data_v:1, /* valid bit */ + uint64_t data_v:1, /* valid bit */ data_size:2, /* page size [8K*8**] */ data_nfo:1, /* no-fault only */ data_ie:1, /* invert endianness [inefficient] */ - data_soft2:2, /* reserved for S/W */ - data_pa:36, /* physical address */ - data_accessed:1,/* S/W accessed bit */ + data_soft2:9, /* reserved for S/W */ + data_reserved:7,/* reserved for future use */ + data_pa:30, /* physical address */ + data_tsblock:1, /* S/W TSB locked entry */ data_modified:1,/* S/W modified bit */ data_realw:1, /* S/W real writable bit (to manage modified) */ - data_tsblock:1, /* S/W TSB locked entry */ + data_accessed:1,/* S/W accessed bit */ data_exec:1, /* S/W Executable */ data_onlyexec:1,/* S/W Executable only */ data_lock:1, /* lock into TLB */ @@ -160,9 +164,9 @@ #define TLB_SZ_MASK 0x6000LL #define TLB_NFO 0x1000LL #define TLB_IE 0x0800LL -#define TLB_SOFT2_MASK 0x07feLL -#define TLB_DIAG_MASK 0x0001fe00LL -#define TLB_PA_MASK 0x01ffe000LL +#define TLB_SOFT2_MASK 0x07fcLL +#define TLB_RESERVED_MASK 0x0003f800LL +#define TLB_PA_MASK 0x07ffe000LL #define TLB_SOFT_MASK 0x1f80LL /* S/W bits */ /* Access & TSB locked bits are swapped so I can set access w/one insn */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Sat Dec 5 08:00:18 UTC 2009 Modified Files: src/sys/arch/sparc64/include: ctlreg.h Log Message: Garbage collect unused or incomplete definitions. To generate a diff of this commit: cvs rdiff -u -r1.47 -r1.48 src/sys/arch/sparc64/include/ctlreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/ctlreg.h diff -u src/sys/arch/sparc64/include/ctlreg.h:1.47 src/sys/arch/sparc64/include/ctlreg.h:1.48 --- src/sys/arch/sparc64/include/ctlreg.h:1.47 Sat Dec 5 07:58:57 2009 +++ src/sys/arch/sparc64/include/ctlreg.h Sat Dec 5 08:00:18 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: ctlreg.h,v 1.47 2009/12/05 07:58:57 nakayama Exp $ */ +/* $NetBSD: ctlreg.h,v 1.48 2009/12/05 08:00:18 nakayama Exp $ */ /* * Copyright (c) 1996-2002 Eduardo Horvath @@ -855,120 +855,8 @@ : "memory"); } -#ifdef __arch64__ -/* native store 32-bit int to alternate address space w/64-bit compiler*/ -static __inline uint32_t -casa(paddr_t loc, int asi, uint32_t value, uint32_t oldvalue) -{ - __asm volatile( - "wr %3,%%g0,%%asi; " - "casa [%1]%%asi,%2,%0 " - : "+r" (value) - : "r" ((unsigned long)(loc)), "r" (oldvalue), "r" (asi) - : "memory"); - return (value); -} -/* native store 64-bit int to alternate address space w/64-bit compiler*/ -static __inline uint64_t -casxa(paddr_t loc, int asi, uint64_t value, uint64_t oldvalue) -{ - __asm volatile( - "wr %3,%%g0,%%asi; " - "casxa [%1]%%asi,%2,%0 " - : "+r" (value) - : "r" ((unsigned long)(loc)), "r" (oldvalue), "r" (asi) - : "memory"); - return (value); -} -#else -#if 0 -/* native store 64-bit int to alternate address space w/32-bit compiler*/ -static __inline uint64_t -casxa(paddr_t loc, int asi, uint64_t value, uint64_t oldvalue) -{ - int _casxa_lo, _casxa_hi, _loc_hi, _oval_hi; - - _casxa_lo = value; - _casxa_hi = ((uint64_t)value)>>32; - _oval_hi = ((uint64_t)oldvalue)>>32; - _loc_hi = (((uint64_t)loc)>>32); - -#ifdef __notyet -/* - * gcc cannot handle this since it thinks it has >10 asm operands. - */ - if (PHYS_ASI(asi)) { - __asm volatile( - "wr %6,%%g0,%%asi; " - "sllx %1,32,%1; " - "rdpr %%pstate,%2; " - "sllx %0,32,%0; " - "or %1,%2,%1; " - "sllx %3,32,%3; " - "or %0,%4,%0; " - "or %3,%5,%3; " - "wrpr %2,8,%%pstate; " - "casxa [%0]%%asi,%3,%1; " - "wrpr %2,0,%%pstate; " - "andn %0,0x1f,%3; " - "membar #Sync; " - "sll %1,0,%2; " - "srax %1,32,%1; " - "wr %%g0, 0x82, %%asi " - : "+r" (_loc_hi), "+r" (_casxa_hi), "+r" (_casxa_lo), "+r" (_oval_hi) - : "r" ((unsigned long)(loc)), "r" ((unsigned int)(oldvalue)), - "r" (asi) - : "memory"); - } else { - __asm volatile( - "wr %7,%%g0,%%asi; " - "sllx %1,32,%1; " - "sllx %5,32,%0; " - "or %1,%2,%1; " - "sllx %3,32,%2; " - "or %0,%4,%0; " - "or %2,%4,%2; " - "casxa [%0]%%asi,%2,%1; " - "sll %1,0,%2; " - "srax %o1,32,%o1; " - "wr %%g0, 0x82, %%asi " - : "=&r" (_loc_hi), "+r" (_casxa_hi), "+r" (_casxa_lo) - : "r" ((int)(_oval_hi)), "r" ((int)(oldvalue)), - "r" ((unsigned long)(loc)), "r" (_loc_hi), - "r" (asi) - : "memory"); - } -#endif - return (((uint64_t)_casxa_hi<<32)|(uint64_t)_casxa_lo); -} -#endif -#endif - /* flush address from data cache */ -#define flush(loc) ({ \ - __asm volatile("flush %0" : : \ - "r" ((unsigned long)(loc))); \ -}) - -/* Flush a D$ line */ -#if 0 -#define flushline(loc) ({ \ - stxa(((paddr_t)loc)&(~0x1f), (ASI_DCACHE_TAG), 0); \ -membar_sync(); \ -}) -#endif - -/* The following two enable or disable the dcache in the LSU control register */ -#define dcenable() ({ \ - int res; \ - __asm volatile("ldxa [%%g0] %1,%0; or %0,%2,%0; stxa %0,[%%g0] %1; membar #Sync" \ - : "r" (res) : "n" (ASI_MCCR), "n" (MCCR_DCACHE_EN)); \ -}) -#define dcdisable() ({ \ - int res; \ - __asm volatile("ldxa [%%g0] %1,%0; andn %0,%2,%0; stxa %0,[%%g0] %1; membar #Sync" \ - : "r" (res) : "n" (ASI_MCCR), "n" (MCCR_DCACHE_EN)); \ -}) +#define flush(loc) __asm volatile("flush %0" : : "r" ((__uintptr_t)(loc))) /* * SPARC V9 memory barrier instructions.
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Sat Dec 5 07:58:57 UTC 2009 Modified Files: src/sys/arch/sparc64/include: ctlreg.h Log Message: Bring together similar inline asm codes of ld*a and st*a definitions using macro, also remove unnecessary membar #Sync and %asi restore in the case of 32-bit kernel. While there, introduce an optimization case that asi is constant if we are using gcc. To generate a diff of this commit: cvs rdiff -u -r1.46 -r1.47 src/sys/arch/sparc64/include/ctlreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/ctlreg.h diff -u src/sys/arch/sparc64/include/ctlreg.h:1.46 src/sys/arch/sparc64/include/ctlreg.h:1.47 --- src/sys/arch/sparc64/include/ctlreg.h:1.46 Sat Nov 28 21:07:02 2009 +++ src/sys/arch/sparc64/include/ctlreg.h Sat Dec 5 07:58:57 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: ctlreg.h,v 1.46 2009/11/28 21:07:02 mrg Exp $ */ +/* $NetBSD: ctlreg.h,v 1.47 2009/12/05 07:58:57 nakayama Exp $ */ /* * Copyright (c) 1996-2002 Eduardo Horvath @@ -477,490 +477,372 @@ */ #ifdef __arch64__ -static __inline u_char -lduba(paddr_t loc, int asi) -{ - register unsigned int _lduba_v; - - __asm volatile( - "wr %2, %%g0, %%asi; " - "lduba [%1]%%asi, %0 " - : "=r" (_lduba_v) - : "r" ((unsigned long)(loc)), "r" (asi)); - return (_lduba_v); -} -#else -static __inline u_char -lduba(paddr_t loc, int asi) -{ - register unsigned int _lduba_v, _loc_hi, _pstate; - _loc_hi = (((uint64_t)loc)>>32); - if (PHYS_ASI(asi)) { - __asm volatile( - "wr %4,%%g0,%%asi; " - "sllx %3,32,%0; " - "rdpr %%pstate,%1; " - "or %0,%2,%0; " - "wrpr %1,8,%%pstate; " - "membar #Sync; " - "lduba [%0]%%asi,%0; " - "wrpr %1,0,%%pstate; " - "membar #Sync; " - "wr %%g0, 0x82, %%asi " - : "=&r" (_lduba_v), "=&r" (_pstate) - : "r" ((unsigned long)(loc)), "r" (_loc_hi), "r" (asi)); - } else { - __asm volatile( - "wr %3,%%g0,%%asi; " - "sllx %2,32,%0; " - "or %0,%1,%0; " - "lduba [%0]%%asi,%0; " - "wr %%g0, 0x82, %%asi " - : "=&r" (_lduba_v) - : "r" ((unsigned long)(loc)), "r" (_loc_hi), "r" (asi)); - } - return (_lduba_v); +/* 64-bit kernel, non-constant */ +#define SPARC64_LD_NONCONST(ld) \ + __asm volatile( \ + "wr %2,%%g0,%%asi; "\ + #ld " [%1]%%asi,%0 "\ + : "=r" (_v) \ + : "r" ((__uintptr_t)(loc)), "r" (asi)) + +#if defined(__GNUC__) && defined(__OPTIMIZE__) +#define SPARC64_LD_DEF(ld, type, vtype) \ +static __inline type ld(paddr_t loc, int asi)\ +{ \ + vtype _v; \ + if (__builtin_constant_p(asi)) \ + __asm volatile( \ + #ld " [%1]%2,%0 " \ + : "=r" (_v) \ + : "r" ((__uintptr_t)(loc)), "n" (asi)); \ + else\ + SPARC64_LD_NONCONST(ld);\ + return _v; \ +} +#else +#define SPARC64_LD_DEF(ld, type, vtype) \ +static __inline type ld(paddr_t loc, int asi)\ +{ \ + vtype _v; \ + SPARC64_LD_NONCONST(ld); \ + return _v; \ } #endif +#define SPARC64_LD_DEF64(ld, type) SPARC64_LD_DEF(ld, type, uint64_t) -#ifdef __arch64__ -/* load half-word from alternate address space */ -static __inline u_short -lduha(paddr_t loc, int asi) -{ - register unsigned int _lduha_v; - - __asm volatile( - "wr %2, %%g0, %%asi; " - "lduha [%1]%%asi, %0 " - : "=r" (_lduha_v) - : "r" ((unsigned long)(loc)), "r" (asi)); - return (_lduha_v); -} -#else -/* load half-word from alternate address space */ -static __inline u_short -lduha(paddr_t loc, int asi) { - register unsigned int _lduha_v, _loc_hi, _pstate; - - _loc_hi = (((uint64_t)loc)>>32); +#else /* __arch64__ */ - if (PHYS_ASI(asi)) { - __asm volatile( - "wr %4,%%g0,%%asi; " - "sllx %3,32,%0; " - "rdpr %%pstate,%1; " - "wrpr %1,8,%%pstate; " - "or %0,%2,%0; " - "membar #Sync; " - "lduha [%0]%%asi,%0; " - "wrpr %1,0,%%pstate; " - "membar #Sync; " - "wr %%g0, 0x82, %%asi " - : "=&r" (_lduha_v), "=&r" (_pstate) - : "r" ((unsigned long)(loc)), "r" (_loc_hi), "r" (asi)); - } else { - __asm volatile( - "wr %3,%%g0,%%asi; " - "sllx %2,32,%0; " - "or %0,%1,%0; " - "lduha [%0]%%asi,%0; " - "wr %%g0, 0x82, %%asi " - : "=&r" (_lduha_v) - : "r" ((unsigned long)(loc)), "r" (_loc_hi), "r" (asi)); - } - return (_lduha_v); +/* 32-bit kernel, MMU bypass, non-constant */ +#define SPARC64_LD_PHYS_NONCONST(ld) \ + __asm volatile( \ + "rdpr %%pstate,%1; "\ + "sllx %3,32,%0; "\ + "wrpr %1,8,%%pstate; "\ + "or %0,%2,%0; "\ + "wr %4,%%g0,%%asi; "\ + #ld " [%0]%%asi,%0; "\ + "wrpr %1,0,%%pstate "\ + : "=&r" (_v), "=&r" (_pstate)\ + : "r" ((uint32_t)(loc)), "r" (_hi), "r" (asi)) +/* 32-bit kernel, non-constant */ +#define SPARC64_LD_NONCONST(ld) \ + __asm volatile( \ + "wr %2,%%g0,%%asi; "\ + #ld " [%1]%%asi,%0 "\ + : "=&r" (_v) \ + : "r" ((uint32_t)(loc)), "r" (asi)) +/* 32-bit kernel, MMU bypas
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Fri Dec 4 17:31:06 UTC 2009 Modified Files: src/sys/arch/sparc64/include: psl.h Log Message: Bring together similar definitions of inline functions manipulating privileged registers using macro. no functional change. To generate a diff of this commit: cvs rdiff -u -r1.42 -r1.43 src/sys/arch/sparc64/include/psl.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/psl.h diff -u src/sys/arch/sparc64/include/psl.h:1.42 src/sys/arch/sparc64/include/psl.h:1.43 --- src/sys/arch/sparc64/include/psl.h:1.42 Wed Nov 25 14:28:50 2009 +++ src/sys/arch/sparc64/include/psl.h Fri Dec 4 17:31:06 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.42 2009/11/25 14:28:50 rmind Exp $ */ +/* $NetBSD: psl.h,v 1.43 2009/12/04 17:31:06 nakayama Exp $ */ /* * Copyright (c) 1992, 1993 @@ -251,92 +251,58 @@ /* * Inlines for manipulating privileged registers */ -static __inline uint64_t -gettick(void) -{ -#ifdef __arch64__ - uint64_t tick; - - __asm volatile("rdpr %%tick, %0" : "=r" (tick)); - return tick; -#else - uint32_t tick_hi, tick_lo; - - __asm volatile("rdpr %%tick, %0; srl %0,0,%1; srlx %0,32,%0" - : "=r" (tick_hi), "=r" (tick_lo)); - return ((uint64_t)tick_hi << 32) | tick_lo; -#endif +#define SPARC64_GETPR_DEF(pr, type) \ +static __inline type get##pr(void) \ +{ \ + type pr; \ + __asm volatile("rdpr %%" #pr ",%0" : "=r" (pr)); \ + return pr; \ +} +#define SPARC64_SETPR_DEF(pr, type) \ +static __inline void set##pr(type pr) \ +{ \ + __asm volatile("wrpr %0,0,%%" #pr : : "r" (pr) : "memory"); \ } -static __inline void -settick(uint64_t newtick) -{ #ifdef __arch64__ - __asm volatile("wrpr %0, 0, %%tick" : : "r" (newtick) : "memory"); +#define SPARC64_GETPR64_DEF(pr) SPARC64_GETPR_DEF(pr, uint64_t) +#define SPARC64_SETPR64_DEF(pr) SPARC64_SETPR_DEF(pr, uint64_t) #else - uint32_t tick_hi = newtick >> 32, tick_lo = newtick; - - __asm volatile("sllx %1,32,%0; or %0,%2,%0; wrpr %0, 0, %%tick" - : "=&r" (tick_hi) /* scratch register */ - : "r" (tick_hi), "r" (tick_lo) : "memory"); -#endif +#define SPARC64_GETPR64_DEF(pr) \ +static __inline uint64_t get##pr(void) \ +{ \ + uint32_t _hi, _lo; \ + __asm volatile("rdpr %%" #pr ",%0; srl %0,0,%1; srlx %0,32,%0" \ + : "=r" (_hi), "=r" (_lo));\ + return ((uint64_t)_hi << 32) | _lo;\ +} +#define SPARC64_SETPR64_DEF(pr) \ +static __inline void set##pr(uint64_t pr)\ +{ \ + uint32_t _hi = pr >> 32, _lo = pr;\ + __asm volatile("sllx %1,32,%0; or %0,%2,%0; wrpr %0,0,%%" #pr \ + : "=&r" (_hi) /* scratch register */ \ + : "r" (_hi), "r" (_lo) : "memory"); \ } +#endif -static __inline int -getpstate(void) -{ - int pstate; - - __asm volatile("rdpr %%pstate,%0" : "=r" (pstate)); - return pstate; -} - -static __inline void -setpstate(int newpstate) -{ - __asm volatile("wrpr %0,0,%%pstate" : : "r" (newpstate) : "memory"); -} - -static __inline int -gettl(void) -{ - int tl; - - __asm volatile("rdpr %%tl, %0" : "=r" (tl)); - return tl; -} - -static __inline int -getcwp(void) -{ - int cwp; - - __asm volatile("rdpr %%cwp,%0" : "=r" (cwp)); - return cwp; -} - -static __inline void -setcwp(int newcwp) -{ - __asm volatile("wrpr %0,0,%%cwp" : : "r" (newcwp) : "memory"); -} - -static __inline uint64_t -getver(void) -{ -#ifdef __arch64__ - uint64_t ver; - - __asm volatile("rdpr %%ver,%0" : "=r" (ver)); - return ver; -#else - uint32_t ver_hi, ver_lo; +/* Tick Register (PR 4) */ +SPARC64_GETPR64_DEF(tick) +SPARC64_SETPR64_DEF(tick) + +/* Processor State Register (PR 6) */ +SPARC64_GETPR_DEF(pstate, int) +SPARC64_SETPR_DEF(pstate, int) + +/* Trap Level Register (PR 7) */ +SPARC64_GETPR_DEF(tl, int) + +/* Current Window Pointer Register (PR 9) */ +SPARC64_GETPR_DEF(cwp, int) +SPARC64_SETPR_DEF(cwp, int) - __asm volatile("rdpr %%ver,%0; srl %0,0,%1; srlx %0,32,%0" - : "=r" (ver_hi), "=r" (ver_lo)); - return (uint64_t)ver_hi << 32 | ver_lo; -#endif -} +/* Version Register (PR 31) */ +SPARC64_GETPR64_DEF(ver) static __inline int intr_disable(void) @@ -419,7 +385,7 @@ ipl_t _ipl; } ipl_cookie_t; -static inline ipl_cookie_t +static __inline ipl_cookie_t makeiplcookie(ipl_t ipl) {
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Fri Dec 4 12:24:23 UTC 2009 Modified Files: src/sys/arch/sparc64/include: bus.h Log Message: s/u_intN_t/uintN_t/ and whitespace nit. no functional change. To generate a diff of this commit: cvs rdiff -u -r1.60 -r1.61 src/sys/arch/sparc64/include/bus.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/bus.h diff -u src/sys/arch/sparc64/include/bus.h:1.60 src/sys/arch/sparc64/include/bus.h:1.61 --- src/sys/arch/sparc64/include/bus.h:1.60 Fri Dec 4 12:22:16 2009 +++ src/sys/arch/sparc64/include/bus.h Fri Dec 4 12:24:23 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: bus.h,v 1.60 2009/12/04 12:22:16 nakayama Exp $ */ +/* $NetBSD: bus.h,v 1.61 2009/12/04 12:24:23 nakayama Exp $ */ /*- * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. @@ -105,8 +105,8 @@ uint8_t _sasi; } bus_space_handle_t; typedef enum bus_type bus_type_t; -typedef u_int64_t bus_addr_t; -typedef u_int64_t bus_size_t; +typedef uint64_t bus_addr_t; +typedef uint64_t bus_size_t; /* * -- convert prom virtual address to bus_space_handle_t @@ -141,7 +141,7 @@ int type; - int (*sparc_bus_alloc)(bus_space_tag_t, bus_addr_t, + int (*sparc_bus_alloc)(bus_space_tag_t, bus_addr_t, bus_addr_t, bus_size_t, bus_size_t, bus_size_t, int, bus_addr_t *, bus_space_handle_t *); @@ -335,7 +335,7 @@ } /* - * u_intN_t bus_space_read_N(bus_space_tag_t tag, + * uintN_t bus_space_read_N(bus_space_tag_t tag, * bus_space_handle_t bsh, bus_size_t offset); * * Read a 1, 2, 4, or 8 byte quantity from bus space @@ -355,25 +355,25 @@ (0 ? (t)->type : ldxa((h)._ptr + (o), (h)._asi)) #else #define bus_space_read_1(t, h, o) ({ \ - unsigned char __bv = \ + uint8_t __bv = \ lduba((h)._ptr + (o), (h)._asi);\ if (bus_space_debug & BSDB_ACCESS)\ printf("bsr1(%llx + %llx, %x) -> %x\n", (long long)(h)._ptr, \ (long long)(o), \ - (h)._asi, (unsigned int) __bv);\ + (h)._asi, (uint32_t) __bv);\ __bv; }) #define bus_space_read_2(t, h, o) ({ \ - unsigned short __bv = \ + uint16_t __bv = \ lduha((h)._ptr + (o), (h)._asi);\ if (bus_space_debug & BSDB_ACCESS)\ printf("bsr2(%llx + %llx, %x) -> %x\n", (long long)(h)._ptr, \ (long long)(o), \ - (h)._asi, (unsigned int)__bv);\ + (h)._asi, (uint32_t)__bv);\ __bv; }) #define bus_space_read_4(t, h, o) ({ \ - unsigned int __bv = \ + uint32_t __bv = \ lda((h)._ptr + (o), (h)._asi);\ if (bus_space_debug & BSDB_ACCESS)\ printf("bsr4(%llx + %llx, %x) -> %x\n", (long long)(h)._ptr, \ @@ -382,7 +382,7 @@ __bv; }) #define bus_space_read_8(t, h, o) ({ \ - u_int64_t __bv = \ + uint64_t __bv = \ ldxa((h)._ptr + (o), (h)._asi);\ if (bus_space_debug & BSDB_ACCESS)\ printf("bsr8(%llx + %llx, %x) -> %llx\n", (long long)(h)._ptr, \ @@ -393,7 +393,7 @@ /* * void bus_space_read_multi_N(bus_space_tag_t tag, * bus_space_handle_t bsh, bus_size_t offset, - * u_intN_t *addr, size_t count); + * uintN_t *addr, size_t count); * * Read `count' 1, 2, 4, or 8 byte quantities from bus space * described by tag/handle/offset and copy into buffer provided. @@ -401,20 +401,20 @@ static __inline void bus_space_read_multi_1(bus_space_tag_t, bus_space_handle_t, - bus_size_t, u_int8_t *, size_t); + bus_size_t, uint8_t *, size_t); static __inline void bus_space_read_multi_2(bus_space_tag_t, bus_space_handle_t, - bus_size_t, u_int16_t *, size_t); + bus_size_t, uint16_t *, size_t); static __inline void bus_space_read_multi_4(bus_space_tag_t, bus_space_handle_t, - bus_size_t, u_int32_t *, size_t); + bus_size_t, uint32_t *, size_t); static __inline void bus_space_read_multi_8(bus_space_tag_t, bus_space_handle_t, - bus_size_t, u_int64_t *, size_t); + bus_size_t, uint64_t *, size_t); static __inline void bus_space_read_multi_1(bus_space_tag_t t, bus_space_handle_t h, - bus_size_t o, u_int8_t * a, size_t c) + bus_size_t o, uint8_t * a, size_t c) { while (c-- > 0) *a++ = bus_space_read_1(t, h, o); @@ -422,7 +422,7 @@ static __inline void bus_space_read_multi_2(bus_space_tag_t t, bus_space_handle_t h, - bus_size_t o, u_int16_t * a, size_t c) + bus_size_t o, uint16_t * a, size_t c) { while (c-- > 0) *a++ = bus_space_read_2(t, h, o); @@ -430,7 +430,7 @@ static __inline void bus_space_read_multi_4(bus_space_tag_t t, bus_space_handle_t h, - bus_size_t o, u_int32_t * a, size_t c) + bus_size_t o, uint32_t * a, size_t c) { while (c-- > 0) *a++ = bus_space_read_4(t, h, o); @@ -438,7 +438,7 @@ static __inline void bus_space_read_multi_8(bus_space_tag_t t, bus_space_handle_t h, - bus_size_t o, u_int64_t * a, size_t c) + bus_size_t o, uint64_t * a, size_t c) { while (c-- > 0) *a++
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Fri Dec 4 12:22:17 UTC 2009 Modified Files: src/sys/arch/sparc64/include: bus.h Log Message: bus_space_handle_t: - make _asi and _sasi unsigned to reduce superfluous codes by sign extension. - remove unused member _virtual. To generate a diff of this commit: cvs rdiff -u -r1.59 -r1.60 src/sys/arch/sparc64/include/bus.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/bus.h diff -u src/sys/arch/sparc64/include/bus.h:1.59 src/sys/arch/sparc64/include/bus.h:1.60 --- src/sys/arch/sparc64/include/bus.h:1.59 Mon Jun 1 01:14:06 2009 +++ src/sys/arch/sparc64/include/bus.h Fri Dec 4 12:22:16 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: bus.h,v 1.59 2009/06/01 01:14:06 macallan Exp $ */ +/* $NetBSD: bus.h,v 1.60 2009/12/04 12:22:16 nakayama Exp $ */ /*- * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. @@ -101,9 +101,8 @@ */ typedef struct _bus_space_handle { uint64_t _ptr; - int8_t _asi; - int8_t _sasi; - char _virtual; + uint8_t _asi; + uint8_t _sasi; } bus_space_handle_t; typedef enum bus_type bus_type_t; typedef u_int64_t bus_addr_t;
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: nakayama Date: Mon Nov 30 09:34:39 UTC 2009 Modified Files: src/sys/arch/sparc64/include: intr.h Log Message: sparc64_ipi_flush_ctx and sparc64_ipi_flush_all have been removed, so remove its event counters as well. To generate a diff of this commit: cvs rdiff -u -r1.25 -r1.26 src/sys/arch/sparc64/include/intr.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/intr.h diff -u src/sys/arch/sparc64/include/intr.h:1.25 src/sys/arch/sparc64/include/intr.h:1.26 --- src/sys/arch/sparc64/include/intr.h:1.25 Mon Apr 28 20:23:37 2008 +++ src/sys/arch/sparc64/include/intr.h Mon Nov 30 09:34:39 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: intr.h,v 1.25 2008/04/28 20:23:37 martin Exp $ */ +/* $NetBSD: intr.h,v 1.26 2009/11/30 09:34:39 nakayama Exp $ */ /*- * Copyright (c) 1998 The NetBSD Foundation, Inc. @@ -75,13 +75,10 @@ #endif /* _LOCORE */ #define IPI_EVCNT_TLB_PTE 0 -#define IPI_EVCNT_TLB_CTX 1 -#define IPI_EVCNT_TLB_ALL 2 -#define IPI_EVCNT_FPU_SYNCH 3 -#define IPI_EVCNT_FPU_FLUSH 4 -#define IPI_EVCNT_NUM 5 -#define IPI_EVCNT_NAMES { "TLB pte IPI", "TLB ctx IPI", "TLB all IPI", \ - "FPU synch IPI", "FPU flush IPI" } +#define IPI_EVCNT_FPU_SYNCH 1 +#define IPI_EVCNT_FPU_FLUSH 2 +#define IPI_EVCNT_NUM 3 +#define IPI_EVCNT_NAMES { "TLB pte IPI", "FPU synch IPI", "FPU flush IPI" } #endif #endif /* _SPARC64_INTR_H_ */
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: mrg Date: Sat Nov 28 21:07:02 UTC 2009 Modified Files: src/sys/arch/sparc64/include: ctlreg.h Log Message: add some ultrasparcIII defines, from openbsd. To generate a diff of this commit: cvs rdiff -u -r1.45 -r1.46 src/sys/arch/sparc64/include/ctlreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/ctlreg.h diff -u src/sys/arch/sparc64/include/ctlreg.h:1.45 src/sys/arch/sparc64/include/ctlreg.h:1.46 --- src/sys/arch/sparc64/include/ctlreg.h:1.45 Sat May 16 19:15:34 2009 +++ src/sys/arch/sparc64/include/ctlreg.h Sat Nov 28 21:07:02 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: ctlreg.h,v 1.45 2009/05/16 19:15:34 nakayama Exp $ */ +/* $NetBSD: ctlreg.h,v 1.46 2009/11/28 21:07:02 mrg Exp $ */ /* * Copyright (c) 1996-2002 Eduardo Horvath @@ -63,6 +63,10 @@ #define ASI_FLUSH_D_CTX_PRIMARY 0x3a /* [4u] flush D-cache context using primary context */ #define ASI_FLUSH_D_CTX_SECONDARY 0x3b /* [4u] flush D-cache context using secondary context */ +#define ASI_DCACHE_INVALIDATE 0x42 /* [III] invalidate D-cache */ +#define ASI_DCACHE_UTAG 0x43 /* [III] diagnostic access to D-cache micro tag */ +#define ASI_DCACHE_SNOOP_TAG 0x44 /* [III] diagnostic access to D-cache snoop tag RAM */ + #define ASI_LSU_CONTROL_REGISTER 0x45 /* [4u] load/store unit control register */ #define ASI_DCACHE_DATA 0x46 /* [4u] diagnostic access to D-cache data RAM */ @@ -244,6 +248,7 @@ /* * The following are the control registers * They work on both MMUs unless noted. + * III = cheetah only * * Register contents are defined later on individual registers. */ @@ -257,6 +262,9 @@ #define TLB_TAG_ACCESS 0x30 #define VIRTUAL_WATCHPOINT 0x38 #define PHYSICAL_WATCHPOINT 0x40 +#define TSB_PEXT 0x48 /* III primary ext */ +#define TSB_SEXT 0x50 /* III 2ndary ext -- DMMU only */ +#define TSB_NEXT 0x58 /* III nucleus ext */ /* Tag Target bits */ #define TAG_TARGET_VA_MASK 0x03LL
CVS commit: src/sys/arch/sparc64/include
Module Name:src Committed By: macallan Date: Mon Jun 1 01:14:07 UTC 2009 Modified Files: src/sys/arch/sparc64/include: bus.h Log Message: #define BUS_SPACE_MAP_LARGE 0 so SBus framebuffer drivers compile again To generate a diff of this commit: cvs rdiff -u -r1.58 -r1.59 src/sys/arch/sparc64/include/bus.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/sparc64/include/bus.h diff -u src/sys/arch/sparc64/include/bus.h:1.58 src/sys/arch/sparc64/include/bus.h:1.59 --- src/sys/arch/sparc64/include/bus.h:1.58 Mon Apr 28 20:23:36 2008 +++ src/sys/arch/sparc64/include/bus.h Mon Jun 1 01:14:06 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: bus.h,v 1.58 2008/04/28 20:23:36 martin Exp $ */ +/* $NetBSD: bus.h,v 1.59 2009/06/01 01:14:06 macallan Exp $ */ /*- * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. @@ -307,7 +307,8 @@ #define BUS_SPACE_MAP_BUS2 0x0200 #define BUS_SPACE_MAP_BUS3 0x0400 #define BUS_SPACE_MAP_BUS4 0x0800 - +/* sparc uses this, it's not supposed to do anything on sparc64 */ +#define BUS_SPACE_MAP_LARGE 0 /* flags for bus_space_barrier() */ #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */